From: <gabriel.fernandez@st.com>
To: Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Kumar Gala <galak@codeaurora.org>,
Srinivas Kandagatla <srinivas.kandagatla@gmail.com>,
Patrice Chotard <patrice.chotard@st.com>,
Russell King <linux@armlinux.org.uk>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@codeaurora.org>,
Olivier Bideau <olivier.bideau@st.com>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
Andrzej Hajda <a.hajda@samsung.com>,
Pankaj Dev <pankaj.dev@st.com>,
Dinh Nguyen <dinguyen@opensource.altera.com>,
Arnd Bergmann <arnd@arndb.de>,
Thierry Reding <treding@nvidia.com>
Cc: <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>, <kernel@stlinux.com>,
<linux-clk@vger.kernel.org>, Lee Jones <lee.jones@linaro.org>,
Peter Griffin <peter.griffin@linaro.org>,
<arnaud.pouliquen@st.com>, <benjamin.gaignard@st.com>,
<vincent.abriou@st.com>, <gabriel.fernandez@st.com>,
Gabriel Fernandez <gabriel.fernandez@linaro.org>
Subject: [PATCH v3 03/14] ARM: DT: STiH4xx: Simplify clock binding of STiH4xx platforms
Date: Mon, 29 Aug 2016 14:26:55 +0200 [thread overview]
Message-ID: <1472473626-15398-4-git-send-email-gabriel.fernandez@st.com> (raw)
In-Reply-To: <1472473626-15398-1-git-send-email-gabriel.fernandez@st.com>
From: Gabriel Fernandez <gabriel.fernandez@st.com>
This patch simplifies the clock binding because we had too much detail.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
---
arch/arm/boot/dts/stih407-clock.dtsi | 18 +++++++++---------
arch/arm/boot/dts/stih410-clock.dtsi | 16 ++++++++--------
arch/arm/boot/dts/stih418-clock.dtsi | 16 ++++++++--------
3 files changed, 25 insertions(+), 25 deletions(-)
diff --git a/arch/arm/boot/dts/stih407-clock.dtsi b/arch/arm/boot/dts/stih407-clock.dtsi
index ad45f5e..38a56d7 100644
--- a/arch/arm/boot/dts/stih407-clock.dtsi
+++ b/arch/arm/boot/dts/stih407-clock.dtsi
@@ -42,7 +42,7 @@
clockgen_a9_pll: clockgen-a9-pll {
#clock-cells = <1>;
- compatible = "st,stih407-plls-c32-a9", "st,clkgen-plls-c32";
+ compatible = "st,stih407-clkgen-plla9";
clocks = <&clk_sysin>;
@@ -55,7 +55,7 @@
*/
clk_m_a9: clk-m-a9@92b0000 {
#clock-cells = <0>;
- compatible = "st,stih407-clkgen-a9-mux", "st,clkgen-mux";
+ compatible = "st,stih407-clkgen-a9-mux";
reg = <0x92b0000 0x10000>;
clocks = <&clockgen_a9_pll 0>,
@@ -96,7 +96,7 @@
clk_s_a0_pll: clk-s-a0-pll {
#clock-cells = <1>;
- compatible = "st,stih407-plls-c32-a0", "st,clkgen-plls-c32";
+ compatible = "st,clkgen-pll0";
clocks = <&clk_sysin>;
@@ -117,7 +117,7 @@
clk_s_c0_quadfs: clk-s-c0-quadfs@9103000 {
#clock-cells = <1>;
- compatible = "st,stih407-quadfs660-C", "st,quadfs";
+ compatible = "st,quadfs-pll";
reg = <0x9103000 0x1000>;
clocks = <&clk_sysin>;
@@ -134,7 +134,7 @@
clk_s_c0_pll0: clk-s-c0-pll0 {
#clock-cells = <1>;
- compatible = "st,plls-c32-cx_0", "st,clkgen-plls-c32";
+ compatible = "st,clkgen-pll0";
clocks = <&clk_sysin>;
@@ -143,7 +143,7 @@
clk_s_c0_pll1: clk-s-c0-pll1 {
#clock-cells = <1>;
- compatible = "st,plls-c32-cx_1", "st,clkgen-plls-c32";
+ compatible = "st,clkgen-pll1";
clocks = <&clk_sysin>;
@@ -199,7 +199,7 @@
clk_s_d0_quadfs: clk-s-d0-quadfs@9104000 {
#clock-cells = <1>;
- compatible = "st,stih407-quadfs660-D", "st,quadfs";
+ compatible = "st,quadfs";
reg = <0x9104000 0x1000>;
clocks = <&clk_sysin>;
@@ -233,7 +233,7 @@
clk_s_d2_quadfs: clk-s-d2-quadfs@9106000 {
#clock-cells = <1>;
- compatible = "st,stih407-quadfs660-D", "st,quadfs";
+ compatible = "st,quadfs";
reg = <0x9106000 0x1000>;
clocks = <&clk_sysin>;
@@ -287,7 +287,7 @@
clk_s_d3_quadfs: clk-s-d3-quadfs@9107000 {
#clock-cells = <1>;
- compatible = "st,stih407-quadfs660-D", "st,quadfs";
+ compatible = "st,quadfs";
reg = <0x9107000 0x1000>;
clocks = <&clk_sysin>;
diff --git a/arch/arm/boot/dts/stih410-clock.dtsi b/arch/arm/boot/dts/stih410-clock.dtsi
index fd50496..e8f4d44 100644
--- a/arch/arm/boot/dts/stih410-clock.dtsi
+++ b/arch/arm/boot/dts/stih410-clock.dtsi
@@ -44,7 +44,7 @@
clockgen_a9_pll: clockgen-a9-pll {
#clock-cells = <1>;
- compatible = "st,stih407-plls-c32-a9", "st,clkgen-plls-c32";
+ compatible = "st,stih407-clkgen-plla9";
clocks = <&clk_sysin>;
@@ -98,7 +98,7 @@
clk_s_a0_pll: clk-s-a0-pll {
#clock-cells = <1>;
- compatible = "st,stih407-plls-c32-a0", "st,clkgen-plls-c32";
+ compatible = "st,clkgen-pll0";
clocks = <&clk_sysin>;
@@ -122,7 +122,7 @@
clk_s_c0_quadfs: clk-s-c0-quadfs@9103000 {
#clock-cells = <1>;
- compatible = "st,stih407-quadfs660-C", "st,quadfs";
+ compatible = "st,quadfs-pll";
reg = <0x9103000 0x1000>;
clocks = <&clk_sysin>;
@@ -140,7 +140,7 @@
clk_s_c0_pll0: clk-s-c0-pll0 {
#clock-cells = <1>;
- compatible = "st,plls-c32-cx_0", "st,clkgen-plls-c32";
+ compatible = "st,clkgen-pll0";
clocks = <&clk_sysin>;
@@ -150,7 +150,7 @@
clk_s_c0_pll1: clk-s-c0-pll1 {
#clock-cells = <1>;
- compatible = "st,plls-c32-cx_1", "st,clkgen-plls-c32";
+ compatible = "st,clkgen-pll1";
clocks = <&clk_sysin>;
@@ -218,7 +218,7 @@
clk_s_d0_quadfs: clk-s-d0-quadfs@9104000 {
#clock-cells = <1>;
- compatible = "st,stih407-quadfs660-D", "st,quadfs";
+ compatible = "st,quadfs";
reg = <0x9104000 0x1000>;
clocks = <&clk_sysin>;
@@ -254,7 +254,7 @@
clk_s_d2_quadfs: clk-s-d2-quadfs@9106000 {
#clock-cells = <1>;
- compatible = "st,stih407-quadfs660-D", "st,quadfs";
+ compatible = "st,quadfs";
reg = <0x9106000 0x1000>;
clocks = <&clk_sysin>;
@@ -308,7 +308,7 @@
clk_s_d3_quadfs: clk-s-d3-quadfs@9107000 {
#clock-cells = <1>;
- compatible = "st,stih407-quadfs660-D", "st,quadfs";
+ compatible = "st,quadfs";
reg = <0x9107000 0x1000>;
clocks = <&clk_sysin>;
diff --git a/arch/arm/boot/dts/stih418-clock.dtsi b/arch/arm/boot/dts/stih418-clock.dtsi
index ae6d997..0fd0fa5 100644
--- a/arch/arm/boot/dts/stih418-clock.dtsi
+++ b/arch/arm/boot/dts/stih418-clock.dtsi
@@ -44,7 +44,7 @@
clockgen_a9_pll: clockgen-a9-pll {
#clock-cells = <1>;
- compatible = "st,stih418-plls-c28-a9", "st,clkgen-plls-c32";
+ compatible = "st,stih418-clkgen-plla9";
clocks = <&clk_sysin>;
@@ -98,7 +98,7 @@
clk_s_a0_pll: clk-s-a0-pll {
#clock-cells = <1>;
- compatible = "st,stih407-plls-c32-a0", "st,clkgen-plls-c32";
+ compatible = "st,clkgen-pll0";
clocks = <&clk_sysin>;
@@ -120,7 +120,7 @@
clk_s_c0_quadfs: clk-s-c0-quadfs@9103000 {
#clock-cells = <1>;
- compatible = "st,stih407-quadfs660-C", "st,quadfs";
+ compatible = "st,quadfs-pll";
reg = <0x9103000 0x1000>;
clocks = <&clk_sysin>;
@@ -137,7 +137,7 @@
clk_s_c0_pll0: clk-s-c0-pll0 {
#clock-cells = <1>;
- compatible = "st,plls-c32-cx_0", "st,clkgen-plls-c32";
+ compatible = "st,clkgen-pll0";
clocks = <&clk_sysin>;
@@ -146,7 +146,7 @@
clk_s_c0_pll1: clk-s-c0-pll1 {
#clock-cells = <1>;
- compatible = "st,plls-c32-cx_1", "st,clkgen-plls-c32";
+ compatible = "st,clkgen-pll1";
clocks = <&clk_sysin>;
@@ -212,7 +212,7 @@
clk_s_d0_quadfs: clk-s-d0-quadfs@9104000 {
#clock-cells = <1>;
- compatible = "st,stih407-quadfs660-D", "st,quadfs";
+ compatible = "st,quadfs";
reg = <0x9104000 0x1000>;
clocks = <&clk_sysin>;
@@ -248,7 +248,7 @@
clk_s_d2_quadfs: clk-s-d2-quadfs@9106000 {
#clock-cells = <1>;
- compatible = "st,stih407-quadfs660-D", "st,quadfs";
+ compatible = "st,quadfs";
reg = <0x9106000 0x1000>;
clocks = <&clk_sysin>;
@@ -309,7 +309,7 @@
clk_s_d3_quadfs: clk-s-d3-quadfs@9107000 {
#clock-cells = <1>;
- compatible = "st,stih407-quadfs660-D", "st,quadfs";
+ compatible = "st,quadfs";
reg = <0x9107000 0x1000>;
clocks = <&clk_sysin>;
--
1.9.1
next prev parent reply other threads:[~2016-08-29 12:29 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-08-29 12:26 [PATCH v3 00/14] Clock improvement for video playback gabriel.fernandez
2016-08-29 12:26 ` [PATCH v3 01/14] drivers: clk: st: Remove stih415-416 clock support gabriel.fernandez
2016-09-16 23:02 ` Stephen Boyd
2016-08-29 12:26 ` [PATCH v3 02/14] drivers: clk: st: Simplify clock binding of STiH4xx platforms gabriel.fernandez
2016-09-16 23:02 ` Stephen Boyd
2016-08-29 12:26 ` gabriel.fernandez [this message]
2016-09-15 7:44 ` [PATCH v3 03/14] ARM: DT: STiH4xx: " Patrice Chotard
2016-08-29 12:26 ` [PATCH v3 04/14] drivers: clk: st: Add fs660c32 synthesizer algorithm gabriel.fernandez
2016-09-16 23:03 ` Stephen Boyd
2016-08-29 12:26 ` [PATCH v3 05/14] drivers: clk: st: Add clock propagation for audio clocks gabriel.fernandez
2016-09-16 23:03 ` Stephen Boyd
2016-08-29 12:26 ` [PATCH v3 06/14] drivers: clk: st: Handle clk synchronous mode for video clocks gabriel.fernandez
2016-08-29 12:26 ` [PATCH v3 07/14] ARM: DT: STiH407: Enable clock propagation for audio clocks gabriel.fernandez
2016-09-15 7:46 ` Patrice Chotard
2016-08-29 12:27 ` [PATCH v3 08/14] ARM: DT: STiH410: " gabriel.fernandez
2016-09-15 7:47 ` Patrice Chotard
2016-08-29 12:27 ` [PATCH v3 09/14] ARM: DT: STiH418: " gabriel.fernandez
2016-09-15 7:47 ` Patrice Chotard
2016-08-29 12:27 ` [PATCH v3 10/14] ARM: DT: STiH407: Enable synchronous clock mode for video clocks gabriel.fernandez
2016-09-15 7:47 ` Patrice Chotard
2016-08-29 12:27 ` [PATCH v3 11/14] ARM: DT: STiH410: " gabriel.fernandez
2016-09-15 7:47 ` Patrice Chotard
2016-08-29 12:27 ` [PATCH v3 12/14] ARM: DT: STiH418: " gabriel.fernandez
2016-09-15 7:47 ` Patrice Chotard
2016-08-29 12:27 ` [PATCH v3 13/14] ARM: DT: STi: STiH407: clock configuration to address 720p and 1080p gabriel.fernandez
2016-09-15 7:47 ` Patrice Chotard
2016-08-29 12:27 ` [PATCH v3 14/14] ARM: DT: STi: STiH410: " gabriel.fernandez
2016-09-15 7:48 ` Patrice Chotard
2016-09-05 13:20 ` [PATCH v3 00/14] Clock improvement for video playback Patrice Chotard
2016-09-14 18:36 ` Stephen Boyd
2016-09-15 6:57 ` Patrice Chotard
2016-09-15 11:42 ` Patrice Chotard
2016-09-15 7:47 ` Gabriel Fernandez
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1472473626-15398-4-git-send-email-gabriel.fernandez@st.com \
--to=gabriel.fernandez@st.com \
--cc=a.hajda@samsung.com \
--cc=arnaud.pouliquen@st.com \
--cc=arnd@arndb.de \
--cc=benjamin.gaignard@st.com \
--cc=devicetree@vger.kernel.org \
--cc=dinguyen@opensource.altera.com \
--cc=gabriel.fernandez@linaro.org \
--cc=galak@codeaurora.org \
--cc=geert+renesas@glider.be \
--cc=ijc+devicetree@hellion.org.uk \
--cc=kernel@stlinux.com \
--cc=lee.jones@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux@armlinux.org.uk \
--cc=mark.rutland@arm.com \
--cc=mturquette@baylibre.com \
--cc=olivier.bideau@st.com \
--cc=pankaj.dev@st.com \
--cc=patrice.chotard@st.com \
--cc=peter.griffin@linaro.org \
--cc=robh+dt@kernel.org \
--cc=sboyd@codeaurora.org \
--cc=sebastian.hesselbarth@gmail.com \
--cc=srinivas.kandagatla@gmail.com \
--cc=treding@nvidia.com \
--cc=vincent.abriou@st.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®