From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933548AbcHaHvt (ORCPT ); Wed, 31 Aug 2016 03:51:49 -0400 Received: from mail-db5eur01on0136.outbound.protection.outlook.com ([104.47.2.136]:1632 "EHLO EUR01-DB5-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S932362AbcHaHvi (ORCPT ); Wed, 31 Aug 2016 03:51:38 -0400 From: Marcel Ziswiler To: "jonathanh@nvidia.com" , "mirza.krak@gmail.com" , "swarren@wwwdotorg.org" , "thierry.reding@gmail.com" CC: "linux-kernel@vger.kernel.org" , "robh+dt@kernel.org" , "mturquette@baylibre.com" , "pgaikwad@nvidia.com" , "linux@armlinux.org.uk" , "devicetree@vger.kernel.org" , "gnurou@gmail.com" , "mark.rutland@arm.com" , "linux-arm-kernel@lists.infradead.org" , "pdeschrijver@nvidia.com" , "sboyd@codeaurora.org" , "linux-tegra@vger.kernel.org" , "linux-clk@vger.kernel.org" Subject: Re: [PATCH v2 2/6] clk: tegra: add TEGRA30_CLK_NOR to init table Thread-Topic: [PATCH v2 2/6] clk: tegra: add TEGRA30_CLK_NOR to init table Thread-Index: AQHSAs91qyA+5BnvfUm25b/LcTVjcw== Date: Wed, 31 Aug 2016 07:17:00 +0000 Message-ID: <1472627819.31008.4.camel@toradex.com> References: <1472569320.5703.23.camel@toradex.com> Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=marcel.ziswiler@toradex.com; x-originating-ip: [46.140.72.82] x-ms-office365-filtering-correlation-id: cc6b2f12-780c-4a31-7888-08d3d16eccd8 x-microsoft-exchange-diagnostics: 1;HE1PR05MB1884;6:LwIjlV7cpdqDvNt3KBzSBgEhwadjj7btj48P/ikMFMpq4EqKJWa950OnIVZfAy+DK3B6FxYqnJDanjMQ0WHLRIdIqaPb9NOLZw3XDjTH+QcFJo2IFKujW24eKkL7RqLYuypPLe8tldrRUtewBUSJoe6Rnp+dB3C5sWUGwL//mQm3cfP/FZuUDYB0uBUzV/Tkjgy3nvA9Zppsc7QCBe5FTRVbqfzIB3Do0DW7eR+qqrOKV+2XlRJAJMvED106FFD9HbjAQKceX3vOqZ/EZe+Cx5V8oP3ky5WalOQ1sJga1+g=;5:3j3upJEOh5wMHLXkWhG6rT9cyhN7Id76sT8DFFpNCt2D6e1WWn/ek7VgmzhezemKJDNkNybytmW9fCHpHOmEIA8D1rj8Xp66QKjdGzqcDLOMkKF3/WVdNN2qFOP4Qh4775onJfbJdxEQjjJzG8Zahw==;24:tlzqJtESPH8U4TmPt/S7ihwBwlpHzwB8NtuKZL6Itpxq+tLC8JZNPxRamGysEh9rsAJUYrxc3Lpl3RXo44xHUqEqIyTXYy4Vug9cecw5Reg=;7:3emxRbF1eZLonj47weTrgBN3JDGWy8frN+u/V3pW3MD9k2tBUpSWX5GSk1lA1aqL1cD4itGpGQwusEPqpvPTL1VdKebMJ98cgb80q0VfNx2zDtc8VEK0jIAwuFJ8t5aRE2wDIYYpt2rYPA4ywga/KT32tL8+LRNhN95JZnTH72qpvxrhTS2SlolusfHxCl7lG3vFr2Ydsxx/mZpuVVlIYMxtLI5Y7ssjHCvBMFYnlt51Qfa6xNINgGXOvUfIaPw7 x-microsoft-antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:HE1PR05MB1884; x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:; x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(6040176)(601004)(2401047)(5005006)(8121501046)(10201501046)(3002001);SRVR:HE1PR05MB1884;BCL:0;PCL:0;RULEID:;SRVR:HE1PR05MB1884; x-forefront-prvs: 00514A2FE6 x-forefront-antispam-report: SFV:NSPM;SFS:(10019020)(6009001)(7916002)(377424004)(199003)(189002)(24454002)(92566002)(3280700002)(7416002)(68736007)(66066001)(2900100001)(19580395003)(97736004)(2201001)(122556002)(103116003)(106356001)(5660300001)(2501003)(189998001)(10400500002)(36756003)(50986999)(3660700001)(5001770100001)(11100500001)(586003)(8676002)(3846002)(6116002)(8936002)(19580405001)(54356999)(76176999)(5002640100001)(81156014)(87936001)(81166006)(86362001)(4326007)(2906002)(101416001)(102836003)(33646002)(105586002)(7736002)(305945005)(106116001)(77096005)(7846002);DIR:OUT;SFP:1102;SCL:1;SRVR:HE1PR05MB1884;H:HE1PR05MB1882.eurprd05.prod.outlook.com;FPR:;SPF:None;PTR:InfoNoRecords;A:1;MX:1;LANG:en; spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="utf-8" Content-ID: <9CCDCE427BCA7741B3A6C77E8BEEBC0B@eurprd05.prod.outlook.com> MIME-Version: 1.0 X-OriginatorOrg: toradex.com X-MS-Exchange-CrossTenant-originalarrivaltime: 31 Aug 2016 07:17:00.0616 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: d9995866-0d9b-4251-8315-093f062abab4 X-MS-Exchange-Transport-CrossTenantHeadersStamped: HE1PR05MB1884 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from base64 to 8bit by mail.home.local id u7V7q8IH002545 On Wed, 2016-08-24 at 15:37 +0200, Mirza Krak wrote: > > From: Mirza Krak > > Add TEGRA30_CLK_NOR to init table and set default rate to 127 MHz > which > is max rate. > > Signed-off-by: Mirza Krak mane.org> > --- > Changes in v2: > - no changes > >  drivers/clk/tegra/clk-tegra30.c | 1 + >  1 file changed, 1 insertion(+) > > diff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk- > tegra30.c > index 8e2db5e..67f1677 100644 > --- a/drivers/clk/tegra/clk-tegra30.c > +++ b/drivers/clk/tegra/clk-tegra30.c > @@ -1252,6 +1252,7 @@ static struct tegra_clk_init_table init_table[] > __initdata = { >   { TEGRA30_CLK_SDMMC1, TEGRA30_CLK_PLL_P, 48000000, 0 }, >   { TEGRA30_CLK_SDMMC2, TEGRA30_CLK_PLL_P, 48000000, 0 }, >   { TEGRA30_CLK_SDMMC3, TEGRA30_CLK_PLL_P, 48000000, 0 }, > + { TEGRA30_CLK_NOR, TEGRA30_CLK_PLL_P, 127000000, 0 }, The Tegra 3 Interface Design Guide states the same 133 MHz. > >   { TEGRA30_CLK_PLL_M, TEGRA30_CLK_CLK_MAX, 0, 1 }, >   { TEGRA30_CLK_PCLK, TEGRA30_CLK_CLK_MAX, 0, 1 }, >   { TEGRA30_CLK_CSITE, TEGRA30_CLK_CLK_MAX, 0, 1 }, > -- > 2.1.4