From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933252AbcIHHEh (ORCPT ); Thu, 8 Sep 2016 03:04:37 -0400 Received: from mga05.intel.com ([192.55.52.43]:22481 "EHLO mga05.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932777AbcIHG6T (ORCPT ); Thu, 8 Sep 2016 02:58:19 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.30,298,1470726000"; d="scan'208";a="1052967023" From: "Fenghua Yu" To: "Thomas Gleixner" , "H. Peter Anvin" , "Ingo Molnar" , "Tony Luck" , "Peter Zijlstra" , "Tejun Heo" , "Borislav Petkov" , "Stephane Eranian" , "Marcelo Tosatti" , "David Carrillo-Cisneros" , "Shaohua Li" , "Ravi V Shankar" , "Vikas Shivappa" , "Sai Prakhya" Cc: "linux-kernel" , "x86" , Fenghua Yu Subject: [PATCH v2 13/33] Define CONFIG_INTEL_RDT Date: Thu, 8 Sep 2016 02:57:07 -0700 Message-Id: <1473328647-33116-14-git-send-email-fenghua.yu@intel.com> X-Mailer: git-send-email 1.8.0.1 In-Reply-To: <1473328647-33116-1-git-send-email-fenghua.yu@intel.com> References: <1473328647-33116-1-git-send-email-fenghua.yu@intel.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Vikas Shivappa CONFIG_INTEL_RDT is defined. The option provides support for resource allocation which is a sub-feature of Intel Resource Director Technology (RDT). Signed-off-by: Vikas Shivappa Signed-off-by: Fenghua Yu Reviewed-by: Tony Luck --- arch/x86/Kconfig | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 2a1f0ce..6782127 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -406,6 +406,19 @@ config GOLDFISH def_bool y depends on X86_GOLDFISH +config INTEL_RDT + bool "Intel Resource Director Technology support" + default n + depends on X86_64 && CPU_SUP_INTEL + help + This option provides support for resource allocation which is a + sub-feature of Intel Resource Director Technology(RDT). + Current implementation supports L3 cache allocation. + Using this feature a user can specify the amount of L3 cache space + into which an application can fill. + + Say N if unsure. + if X86_32 config X86_EXTENDED_PLATFORM bool "Support for extended (non-PC) x86 platforms" -- 2.5.0