From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S966093AbcIHO17 (ORCPT ); Thu, 8 Sep 2016 10:27:59 -0400 Received: from kozue.soulik.info ([108.61.200.231]:57822 "EHLO kozue.soulik.info" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S966037AbcIHO1z (ORCPT ); Thu, 8 Sep 2016 10:27:55 -0400 From: Randy Li To: linux-usb@vger.kernel.org Cc: John.Youn@synopsys.com, kishon@ti.com, felipe.balbi@linux.intel.com, mark.rutland@arm.com, devicetree@vger.kernel.org, heiko@sntech.de, gregkh@linuxfoundation.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, robh+dt@kernel.org, randy.li@rock-chips.com, Randy Li Subject: [PATCH 4/4] ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset Date: Thu, 8 Sep 2016 22:27:16 +0800 Message-Id: <1473344836-26707-5-git-send-email-ayaka@soulik.info> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1473344836-26707-1-git-send-email-ayaka@soulik.info> References: <1473344836-26707-1-git-send-email-ayaka@soulik.info> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The "host1" port (AKA the dwc2 port that isn't the OTG port) on rk3288 has a hardware errata that causes everything to get confused when we get a remote wakeup. We'll use the reset that's in the CRU to reset the port when it's in a bad state. Note that we add the reset to both dwc2 controllers even though only one has the errata in case we find some other use for this reset that's unrelated to the current hardware errata. Only the host port gets the quirk property, though. Signed-off-by: Randy Li --- arch/arm/boot/dts/rk3288.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 17ec2e2..34de803 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -857,6 +857,8 @@ clocks = <&cru SCLK_OTGPHY0>; clock-names = "phyclk"; #clock-cells = <0>; + resets = <&cru SRST_USBOTG_PHY>; + reset-names = "phy-reset"; }; usbphy1: usb-phy@334 { @@ -873,6 +875,8 @@ clocks = <&cru SCLK_OTGPHY2>; clock-names = "phyclk"; #clock-cells = <0>; + resets = <&cru SRST_USBHOST1_PHY>; + reset-names = "phy-reset"; }; }; }; -- 2.7.4