From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752647AbcIII3W (ORCPT ); Fri, 9 Sep 2016 04:29:22 -0400 Received: from mail-wm0-f51.google.com ([74.125.82.51]:36422 "EHLO mail-wm0-f51.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750714AbcIII3R (ORCPT ); Fri, 9 Sep 2016 04:29:17 -0400 From: Jerome Brunet To: Kevin Hilman , Carlo Caione Cc: Jerome Brunet , linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 0/4] ARM: amlogic: Add spifc support to Amlogic's GXBB family Date: Fri, 9 Sep 2016 10:28:54 +0200 Message-Id: <1473409738-27175-1-git-send-email-jbrunet@baylibre.com> X-Mailer: git-send-email 2.7.4 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch series adds the necessary pins, clocks and device tree nodes to enable the spifc controller on the GXBB family. I had to add the nand pins in pintctrl as the pinmux setting left by u-boot was conflicting with the spifc pinmux during my test on the P200. Changes since v1 at : http://lkml.kernel.org/r/1473261223-15412-1-git-send-email-jbrunet@baylibre.com * Omit patches : - dt-bindings: spi-meson: Add GXBB Compatible string - spi: meson: Add GXBB compatible Sent as dedicated series * Omit patch: - clk: gxbb: expose spifc clock Already applied * Rename SPI flash controller pins from spifc_* to nor_* to keep the name aligned with the datasheet Jerome Brunet (3): pinctrl: amlogic: gxbb: add spi nor pins pinctrl: amlogic: gxbb: add nand pins ARM64: dts: amlogic: add spi nor pins Neil Armstrong (1): ARM64: dts: meson-gxbb: Add SPIFC node arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 19 +++++++++++++++ drivers/pinctrl/meson/pinctrl-meson-gxbb.c | 37 +++++++++++++++++++++++++++++ 2 files changed, 56 insertions(+) -- 2.7.4