From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757360AbcILJhn (ORCPT ); Mon, 12 Sep 2016 05:37:43 -0400 Received: from nbd.name ([46.4.11.11]:50232 "EHLO nbd.name" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754615AbcILJhm (ORCPT ); Mon, 12 Sep 2016 05:37:42 -0400 From: John Crispin To: Linus Walleij , Stephen Boyd Cc: Bjorn Andersson , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, John Crispin Subject: [PATCH] pinctrl: qcom: fix masking of pinmux functions Date: Mon, 12 Sep 2016 11:36:55 +0200 Message-Id: <1473673015-33124-1-git-send-email-john@phrozen.org> X-Mailer: git-send-email 1.7.10.4 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The following commit introduced a regression by not properly masking the calculated value. commit 47a01ee9a6c39fe1 ("pinctrl: qcom: Clear all function selection bits") Signed-off-by: John Crispin --- drivers/pinctrl/qcom/pinctrl-msm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c index 51c42d7..775c883 100644 --- a/drivers/pinctrl/qcom/pinctrl-msm.c +++ b/drivers/pinctrl/qcom/pinctrl-msm.c @@ -156,7 +156,7 @@ static int msm_pinmux_set_mux(struct pinctrl_dev *pctldev, spin_lock_irqsave(&pctrl->lock, flags); val = readl(pctrl->regs + g->ctl_reg); - val &= mask; + val &= ~mask; val |= i << g->mux_bit; writel(val, pctrl->regs + g->ctl_reg); -- 1.7.10.4