From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934047AbcIUMWz (ORCPT ); Wed, 21 Sep 2016 08:22:55 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:45583 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751939AbcIUMWt (ORCPT ); Wed, 21 Sep 2016 08:22:49 -0400 DMARC-Filter: OpenDMARC Filter v1.3.1 smtp.codeaurora.org 282FA613A6 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=pass smtp.mailfrom=absahu@codeaurora.org From: Abhishek Sahu To: andy.gross@linaro.org, david.brown@linaro.org, sboyd@codeaurora.org, robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk Cc: mturquette@baylibre.com, galak@codeaurora.org, pradeepb@codeaurora.org, mmcclint@codeaurora.org, varada@codeaurora.org, sricharan@codeaurora.org, architt@codeaurora.org, ntelkar@codeaurora.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Abhishek Sahu Subject: [PATCH v3 0/7] Patches for QCOM IPQ4019 clock driver Date: Wed, 21 Sep 2016 17:51:45 +0530 Message-Id: <1474460512-31994-1-git-send-email-absahu@codeaurora.org> X-Mailer: git-send-email 1.9.1 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org These patches are related to Qualcomm IPQ4019 GCC (Global Clock Controller) driver code mainly adding the nodes for clock marked as fixed in current IPQ4019 clock driver and support for multiple CPU frequencies. [V3] 1. Addressed the review comments given in v2 patches. 2. Replaced the do_div with normal division. 3. Marked the PCNOC node as critical. 4. Modified the frequency values for the recent change done in IPQ4019 bootloader. 5. Changed the i2c node frequency table for 19.05 MHz clock. [V2] 1. Removed the fixed clock references and add the same as clock nodes with recalc_rate operation. 2. Added all the supported cpu frequencies in frequency table. Abhishek Sahu (7): clk: qcom: ipq4019: Added the clock nodes and operations for pll clk: qcom: ipq4019: Added the apss cpu pll divider clock node clk: qcom: ipq4019: Added the nodes for pcnoc clk: qcom: ipq4019: Added all the frequencies for apps cpu clk: qcom: ipq4019: corrected sdcc frequency and parent name clk: qcom: ipq4019: changed the frequency value for ddr pll clk: qcom: ipq4019: changed i2c freq table drivers/clk/qcom/gcc-ipq4019.c | 489 +++++++++++++++++++++++++-- include/dt-bindings/clock/qcom,gcc-ipq4019.h | 11 + 2 files changed, 477 insertions(+), 23 deletions(-) -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project