From: Pengcheng Li <lpc.li@hisilicon.com>
To: <johnyoun@synopsys.com>
Cc: <gregkh@linuxfoundation.org>, <linux-usb@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <xuejiancheng@hisilicon.com>,
<lidongpo@hisilicon.com>, <caizhiyong@hisilicon.com>,
Pengcheng Li <lpc.li@hisilicon.com>
Subject: [PATCH] usb: dwc2: add USBTrdTim to initial value
Date: Thu, 22 Sep 2016 09:39:17 +0800 [thread overview]
Message-ID: <1474508357-119468-1-git-send-email-lpc.li@hisilicon.com> (raw)
After dwc2_core_reset，register is to the initial value, and the USBTrdTim
vale is 0x5. If hsotg->phyif = GUSBCFG_PHYIF8, after the dwc2_writel,the
value is 0xd.So we need to set the USBTrdTim to 0.
Signed-off-by: Pengcheng Li <lpc.li@hisilicon.com>
---
drivers/usb/dwc2/gadget.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
index af46adf..9e52e4f 100644
--- a/drivers/usb/dwc2/gadget.c
+++ b/drivers/usb/dwc2/gadget.c
@@ -2531,7 +2531,7 @@ void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg,
/* keep other bits untouched (so e.g. forced modes are not lost) */
usbcfg = dwc2_readl(hsotg->regs + GUSBCFG);
usbcfg &= ~(GUSBCFG_TOUTCAL_MASK | GUSBCFG_PHYIF16 | GUSBCFG_SRPCAP |
- GUSBCFG_HNPCAP);
+ GUSBCFG_HNPCAP | GUSBCFG_USBTRDTIM_MASK);
/* set the PLL on, remove the HNP/SRP and set the PHY */
val = (hsotg->phyif == GUSBCFG_PHYIF8) ? 9 : 5;
@@ -3413,7 +3413,7 @@ static void dwc2_hsotg_init(struct dwc2_hsotg *hsotg)
/* keep other bits untouched (so e.g. forced modes are not lost) */
usbcfg = dwc2_readl(hsotg->regs + GUSBCFG);
usbcfg &= ~(GUSBCFG_TOUTCAL_MASK | GUSBCFG_PHYIF16 | GUSBCFG_SRPCAP |
- GUSBCFG_HNPCAP);
+ GUSBCFG_HNPCAP | GUSBCFG_USBTRDTIM_MASK);
/* set the PLL on, remove the HNP/SRP and set the PHY */
trdtim = (hsotg->phyif == GUSBCFG_PHYIF8) ? 9 : 5;
--
2.9.3
next reply other threads:[~2016-09-22 1:43 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-22 1:39 Pengcheng Li [this message]
2016-09-23 0:58 ` John Youn
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