From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752513AbcJCKTJ (ORCPT ); Mon, 3 Oct 2016 06:19:09 -0400 Received: from li2-213.members.linode.com ([69.56.173.213]:47442 "EHLO mail.zilogic.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751175AbcJCKTA (ORCPT ); Mon, 3 Oct 2016 06:19:00 -0400 X-Greylist: delayed 510 seconds by postgrey-1.27 at vger.kernel.org; Mon, 03 Oct 2016 06:19:00 EDT From: Vijay Kumar B To: Daniel Mack , Haojian Zhuang , Robert Jarzmik Cc: Vijay Kumar B , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Russell King , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [RESEND PATCH] ARM: dts: pxa2xx: Specify all interrupts for the GPIO controller. Date: Mon, 3 Oct 2016 15:48:12 +0530 Message-Id: <1475489892-10316-1-git-send-email-vijaykumar@zilogic.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1475489412-9758-1-git-send-email-vijaykumar@zilogic.com> References: <1475489412-9758-1-git-send-email-vijaykumar@zilogic.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The PXA GPIO controller has 3 interrupt outputs, this needs to be indicated in the DTS file. Without this mainstone's CPLD interrupt 0 will not be raised to the processor. Signed-off-by: Vijay Kumar B. Reviewed-by: Deepak S. --- arch/arm/boot/dts/pxa2xx.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/pxa2xx.dtsi b/arch/arm/boot/dts/pxa2xx.dtsi index 5e5af07..9ca2e5b 100644 --- a/arch/arm/boot/dts/pxa2xx.dtsi +++ b/arch/arm/boot/dts/pxa2xx.dtsi @@ -54,8 +54,8 @@ reg = <0x40e00000 0x10000>; gpio-controller; #gpio-cells = <0x2>; - interrupts = <10>; - interrupt-names = "gpio_mux"; + interrupts = <8 9 10>; + interrupt-names = "gpio0", "gpio1", "gpio_mux"; interrupt-controller; #interrupt-cells = <0x2>; ranges; -- 2.1.4