From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754707AbcJLMSZ (ORCPT ); Wed, 12 Oct 2016 08:18:25 -0400 Received: from mga11.intel.com ([192.55.52.93]:53871 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752986AbcJLMSJ (ORCPT ); Wed, 12 Oct 2016 08:18:09 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.31,482,1473145200"; d="scan'208";a="19261818" From: Grzegorz Andrejczuk To: tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, x86@kernel.org Cc: bp@suse.de, dave.hansen@linux.intel.com, linux-kernel@vger.kernel.org, lukasz.daniluk@intel.com, james.h.cownie@intel.com, Grzegorz Andrejczuk Subject: [PATCH v2 3/4] Add hwcap2 for x86 Date: Wed, 12 Oct 2016 14:16:24 +0200 Message-Id: <1476274585-21679-4-git-send-email-grzegorz.andrejczuk@intel.com> X-Mailer: git-send-email 2.5.1 In-Reply-To: <1476274585-21679-1-git-send-email-grzegorz.andrejczuk@intel.com> References: <1476274585-21679-1-git-send-email-grzegorz.andrejczuk@intel.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add hwcap2 attribute for x86. Reserve 1st bit of HWCAP2 for exposing Xeon Phi ring 3 monitor/mwait. With this userspace apps can detect Ring 3 MONITOR/MWAIT instructions. Change-Id: I37d0354d1e2b9594d7feebc2bacda30b68163efe Signed-off-by: Grzegorz Andrejczuk --- arch/x86/include/asm/elf.h | 7 +++++++ arch/x86/include/uapi/asm/hwcap.h | 7 +++++++ arch/x86/kernel/cpu/common.c | 3 +++ 3 files changed, 17 insertions(+) create mode 100644 arch/x86/include/uapi/asm/hwcap.h diff --git a/arch/x86/include/asm/elf.h b/arch/x86/include/asm/elf.h index e7f155c..a3f7856 100644 --- a/arch/x86/include/asm/elf.h +++ b/arch/x86/include/asm/elf.h @@ -258,6 +258,13 @@ extern int force_personality32; #define ELF_HWCAP (boot_cpu_data.x86_capability[CPUID_1_EDX]) +extern unsigned int elf_hwcap2; + +/* HWCAP2 supplies kernel enabled CPU feature, so that the application + can know that it can safely use them. The bits are defined in + uapi/asm/hwcap.h. */ +#define ELF_HWCAP2 elf_hwcap2 + /* This yields a string that ld.so will use to load implementation specific libraries for optimization. This is more specific in intent than poking at uname or /proc/cpuinfo. diff --git a/arch/x86/include/uapi/asm/hwcap.h b/arch/x86/include/uapi/asm/hwcap.h new file mode 100644 index 0000000..d1f4f98 --- /dev/null +++ b/arch/x86/include/uapi/asm/hwcap.h @@ -0,0 +1,7 @@ +#ifndef _ASM_HWCAP_H +#define _ASM_HWCAP_H 1 + +/* Kernel enabled Ring 3 MWAIT for Xeon Phi*/ +#define HWCAP2_PHIR3MWAIT (1 << 0) +/* upto bit 31 free */ +#endif diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index bcc9ccc..93ffaa5 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -35,6 +35,7 @@ #include #include #include +#include #include #include #include @@ -51,6 +52,8 @@ #include "cpu.h" +unsigned elf_hwcap2 __read_mostly; + /* all of these masks are initialized in setup_cpu_local_masks() */ cpumask_var_t cpu_initialized_mask; cpumask_var_t cpu_callout_mask; -- 2.5.1