From: Noam Camus <noamca@mellanox.com>
To: <robh+dt@kernel.org>, <mark.rutland@arm.com>
Cc: <daniel.lezcano@linaro.org>, <tglx@linutronix.de>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
Noam Camus <noamca@mellanox.com>
Subject: [PATCH 1/3] soc: Support for NPS HW scheduling
Date: Thu, 13 Oct 2016 17:52:28 +0300 [thread overview]
Message-ID: <1476370350-3853-2-git-send-email-noamca@mellanox.com> (raw)
In-Reply-To: <1476370350-3853-1-git-send-email-noamca@mellanox.com>
From: Noam Camus <noamca@mellanox.com>
This header file is for NPS400 SoC.
It includes macros for save/restore of HW scheduling.
Control is done by writing core functional registers.
This code was moved from arc/plat-eznps so it can be used
from driver/clocksourec/, available only for CONFIG_EZNPS_MTM_EXT.
Signed-off-by: Noam Camus <noamca@mellanox.com>
---
include/soc/nps/mtm.h | 61 +++++++++++++++++++++++++++++++++++++++++++++++++
1 files changed, 61 insertions(+), 0 deletions(-)
create mode 100644 include/soc/nps/mtm.h
diff --git a/include/soc/nps/mtm.h b/include/soc/nps/mtm.h
new file mode 100644
index 0000000..9327010
--- /dev/null
+++ b/include/soc/nps/mtm.h
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2016, Mellanox Technologies. All rights reserved.
+ *
+ * This software is available to you under a choice of one of two
+ * licenses. You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the
+ * OpenIB.org BSD license below:
+ *
+ * Redistribution and use in source and binary forms, with or
+ * without modification, are permitted provided that the following
+ * conditions are met:
+ *
+ * - Redistributions of source code must retain the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer.
+ *
+ * - Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials
+ * provided with the distribution.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#ifndef SOC_NPS_MTM_H
+#define SOC_NPS_MTM_H
+
+#define CTOP_INST_HWSCHD_OFF_R3 0x3B6F00BF
+#define CTOP_INST_HWSCHD_RESTORE_R3 0x3E6F70C3
+
+#define DEFINE_SCHD_FLAG(type, name) type name
+
+static inline void hw_schd_save(unsigned int *flags)
+{
+ __asm__ __volatile__(
+ " .word %1\n"
+ " st r3,[%0]\n"
+ :
+ : "r"(flags), "i"(CTOP_INST_HWSCHD_OFF_R3)
+ : "r3", "memory");
+}
+
+static inline void hw_schd_restore(unsigned int flags)
+{
+ __asm__ __volatile__(
+ " mov r3, %0\n"
+ " .word %1\n"
+ :
+ : "r"(flags), "i"(CTOP_INST_HWSCHD_RESTORE_R3)
+ : "r3");
+}
+
+#endif /* SOC_NPS_MTM_H */
--
1.7.1
next prev parent reply other threads:[~2016-10-13 21:34 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-13 14:52 [PATCH 0/3] Add clockevet for timer-nps driver to NPS400 SoC Noam Camus
2016-10-13 14:52 ` Noam Camus [this message]
2016-10-21 13:52 ` [PATCH 1/3] soc: Support for NPS HW scheduling Daniel Lezcano
2016-10-13 14:52 ` [PATCH 2/3] ARC: [plat-eznps] remove macros for timer0 TSI Noam Camus
2016-10-21 14:12 ` Daniel Lezcano
2016-10-13 14:52 ` [PATCH 3/3] clocksource: Add clockevent support to NPS400 driver Noam Camus
2016-10-18 13:57 ` Rob Herring
2016-10-18 14:32 ` Noam Camus
2016-10-18 14:51 ` Noam Camus
2016-10-21 15:08 ` Daniel Lezcano
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