From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759496AbcJRJpO (ORCPT ); Tue, 18 Oct 2016 05:45:14 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:41231 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1752497AbcJRJpG (ORCPT ); Tue, 18 Oct 2016 05:45:06 -0400 Message-ID: <1476783899.25750.3.camel@mtksdaap41> Subject: Re: [PATCH v2] drm/mediatek: fix a typo From: CK Hu To: Bibby Hsieh CC: David Airlie , Matthias Brugger , Daniel Vetter , , , Yingjoe Chen , Cawa Cheng , Daniel Kurtz , "Philipp Zabel" , YT Shen , "Thierry Reding" , Mao Huang , , , "Sascha Hauer" Date: Tue, 18 Oct 2016 17:44:59 +0800 In-Reply-To: <1476779039-28963-1-git-send-email-bibby.hsieh@mediatek.com> References: <1476779039-28963-1-git-send-email-bibby.hsieh@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.2.3-0ubuntu6 Content-Transfer-Encoding: 7bit MIME-Version: 1.0 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Acked-by: CK Hu On Tue, 2016-10-18 at 16:23 +0800, Bibby Hsieh wrote: > If we want to set the hardware OD to relay mode, > we have to set OD_CFG register rather than > OD_RELAYMODE; otherwise, the system will access > the wrong address. > > Fixes: 7216436420414144646f5d8343d061355fd23483 ("drm/mediatek: set mt8173 dithering function") > Cc: stable@vger.kernel.org # v4.9+ > Signed-off-by: Bibby Hsieh > --- > drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c > index df33b3c..aa5f20f 100644 > --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c > +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c > @@ -123,7 +123,7 @@ static void mtk_od_config(struct mtk_ddp_comp *comp, unsigned int w, > unsigned int bpc) > { > writel(w << 16 | h, comp->regs + DISP_OD_SIZE); > - writel(OD_RELAYMODE, comp->regs + OD_RELAYMODE); > + writel(OD_RELAYMODE, comp->regs + OD_CFG); > mtk_dither_set(comp, bpc, DISP_OD_CFG); > } >