From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752578AbcKGJWC (ORCPT ); Mon, 7 Nov 2016 04:22:02 -0500 Received: from foss.arm.com ([217.140.101.70]:58292 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752345AbcKGJWB (ORCPT ); Mon, 7 Nov 2016 04:22:01 -0500 From: Vladimir Murzin To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: marc.zyngier@arm.com, tglx@linutronix.de, jason@lakedaemon.net Subject: [RESEND PATCH v1 0/6] Support GICv3 ITS in 32-bit mode Date: Mon, 7 Nov 2016 09:21:16 +0000 Message-Id: <1478510482-15471-1-git-send-email-vladimir.murzin@arm.com> X-Mailer: git-send-email 2.0.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, This series introduces GICv3 ITS to 32-bit world. Since I'm limited with real world 32-bit platforms which uses ITS it was tested with help of vITS on 64-bit host running 32-bit guest. I used Andrea's its/v8 branch at [1] with following option passed to kvmtool: --aarch32 --irqchip=gicv3-its --force-pci [1] git://www.linux-arm.org/kvmtool.git Changelog: RFC -> v1 - rebased on 4.9-rc2, gits_read_typer() has been dropped - spilt ITS and vITS in separate patch sets Vladimir Murzin (6): irqchip/gic-v3-its: Change unsigned types for AArch32 compatibility irqchip/gic-v3-its: Narrow down Entry Size when used as a divider irqchip/gicv3-its: Specialise flush_dcache operation irqchip/gicv3-its: Specialise readq and writeq accesses ARM: gic-v3-its: Add 32bit support to GICv3 ITS ARM: virt: Select ARM_GIC_V3_ITS arch/arm/Kconfig | 1 + arch/arm/include/asm/arch_gicv3.h | 54 +++++++++++++++++++++---- arch/arm64/include/asm/arch_gicv3.h | 17 ++++++++ drivers/irqchip/irq-gic-v3-its.c | 75 +++++++++++++++++------------------ include/linux/irqchip/arm-gic-v3.h | 4 +- 5 files changed, 104 insertions(+), 47 deletions(-) -- 1.7.9.5