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From: William Wu <wulf@rock-chips.com>
To: kishon@ti.com, heiko@sntech.de
Cc: linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org,
	robh+dt@kernel.org, frank.wang@rock-chips.com,
	huangtao@rock-chips.com, dianders@google.com,
	briannorris@google.com, groeck@google.com, wulf@rock-chips.com
Subject: [PATCH] phy: rockchip-inno-usb2: correct 480MHz output clock stable time
Date: Mon,  7 Nov 2016 21:00:58 +0800	[thread overview]
Message-ID: <1478523658-9400-1-git-send-email-wulf@rock-chips.com> (raw)

We found that the system crashed due to 480MHz output clock of
USB2 PHY was unstable after clock had been enabled by gpu module.

Theoretically, 1 millisecond is a critical value for 480MHz
output clock stable time, so we try to change the delay time
to 1.2 millisecond to avoid this issue.

Signed-off-by: William Wu <wulf@rock-chips.com>
---
 drivers/phy/phy-rockchip-inno-usb2.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index ecfd7d1..8f2d2b6 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -267,7 +267,7 @@ static int rockchip_usb2phy_clk480m_enable(struct clk_hw *hw)
 			return ret;
 
 		/* waitting for the clk become stable */
-		mdelay(1);
+		udelay(1200);
 	}
 
 	return 0;
-- 
2.0.0

             reply	other threads:[~2016-11-07 13:08 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-11-07 13:00 William Wu [this message]
2016-11-09 20:54 ` Doug Anderson
2016-11-10  2:54   ` wlf
2016-11-10  9:21     ` Heiko Stübner
2016-11-11  3:23       ` wlf

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