From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Praveen Talari <praveen.talari@oss.qualcomm.com>,
Mark Brown <broonie@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, linux-spi@vger.kernel.org,
linux-kernel@vger.kernel.org, bjorn.andersson@oss.qualcomm.com,
mukesh.savaliya@oss.qualcomm.com,
jyothi.seerapu@oss.qualcomm.com
Subject: Re: [PATCH v1] spi: geni-qcom: Check DMA interrupts early in ISR
Date: Tue, 17 Mar 2026 17:52:46 +0100 [thread overview]
Message-ID: <1481817e-6661-48ef-8e1f-707fb168f264@oss.qualcomm.com> (raw)
In-Reply-To: <20260313-spi-geni-qcom-fix-dma-irq-handling-v1-1-0bd122589e02@oss.qualcomm.com>
On 3/13/26 5:19 PM, Praveen Talari wrote:
> The current interrupt handler only checks the GENI main IRQ status
> (m_irq) before deciding to return IRQ_NONE. This can lead to spurious
> IRQ_NONE returns when DMA interrupts are pending but m_irq is zero.
>
> Move the DMA TX/RX status register reads to the beginning of the ISR,
> right after reading m_irq. Update the early return condition to check
> all three status registers (m_irq, dma_tx_status, dma_rx_status) before
> returning IRQ_NONE.
>
> Signed-off-by: Praveen Talari <praveen.talari@oss.qualcomm.com>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Konrad
next prev parent reply other threads:[~2026-03-17 16:52 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-13 16:19 Praveen Talari
2026-03-17 16:52 ` Konrad Dybcio [this message]
2026-03-17 17:08 ` Mark Brown
2026-03-17 18:10 ` Mark Brown
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