From: Andrzej Hajda <a.hajda@samsung.com>
To: Inki Dae <inki.dae@samsung.com>,
dri-devel@lists.freedesktop.org,
Krzysztof Kozlowski <krzk@kernel.org>
Cc: Andrzej Hajda <a.hajda@samsung.com>,
Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>,
Marek Szyprowski <m.szyprowski@samsung.com>,
Kyungmin Park <kyungmin.park@samsung.com>,
linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org
Subject: [PATCH 1/7] drm/exynos/hdmi: add 297MHz pixel clock support
Date: Fri, 20 Jan 2017 07:52:19 +0100 [thread overview]
Message-ID: <1484895145-511-2-git-send-email-a.hajda@samsung.com> (raw)
In-Reply-To: <1484895145-511-1-git-send-email-a.hajda@samsung.com>
297MHz is used by Ultra HD modes.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
---
drivers/gpu/drm/exynos/exynos_hdmi.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c
index 5ed8b1e..bef8965 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -587,6 +587,15 @@ static const struct hdmiphy_config hdmiphy_5433_configs[] = {
0x08, 0x10, 0x01, 0x01, 0x48, 0x4a, 0x00, 0x40,
},
},
+ {
+ .pixel_clock = 297000000,
+ .conf = {
+ 0x01, 0x51, 0x3E, 0x05, 0x40, 0xF0, 0x88, 0xC2,
+ 0x52, 0x53, 0x44, 0x8C, 0x27, 0x00, 0x7C, 0xAC,
+ 0xD6, 0x2B, 0x67, 0x00, 0x00, 0x04, 0x00, 0x30,
+ 0x08, 0x10, 0x01, 0x01, 0x48, 0x40, 0x00, 0x40,
+ },
+ },
};
static const char * const hdmi_clk_gates4[] = {
--
2.7.4
next prev parent reply other threads:[~2017-01-20 6:52 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20170120065229eucas1p22f0eed53220820b1145294029d4bd706@eucas1p2.samsung.com>
2017-01-20 6:52 ` [PATCH 0/7] drm/exynos: add Ultra HD and interlace modes support to Exynos5433 Andrzej Hajda
[not found] ` <CGME20170120065229eucas1p173d2b1844498dd3afdd9d2860cd1ee93@eucas1p1.samsung.com>
2017-01-20 6:52 ` Andrzej Hajda [this message]
[not found] ` <CGME20170120065230eucas1p20a73a6911158fb6eb2f2d2b22db36aba@eucas1p2.samsung.com>
2017-01-20 6:52 ` [PATCH 2/7] drm/exynos/hdmi: fix VSI infoframe registers Andrzej Hajda
[not found] ` <CGME20170120065230eucas1p1839ddd9b5fefa265ad5feab59e67fd2a@eucas1p1.samsung.com>
2017-01-20 6:52 ` [PATCH 3/7] drm/exynos/hdmi: fix PLL for 27MHz settings Andrzej Hajda
[not found] ` <CGME20170120065230eucas1p2e22f7b832ec7e1c770c3e8a27a3341f5@eucas1p2.samsung.com>
2017-01-20 6:52 ` [PATCH 4/7] drm/exynos/hdmi: add bridge support Andrzej Hajda
2017-02-01 7:31 ` Inki Dae
2017-02-01 7:34 ` Andrzej Hajda
2017-02-01 7:44 ` Inki Dae
2017-02-01 8:12 ` Andrzej Hajda
2017-02-01 8:17 ` Inki Dae
[not found] ` <CGME20170201082940eucas1p1f19e15328a787d6b77cba97bad92afce@eucas1p1.samsung.com>
2017-02-01 8:29 ` [PATCH v3 " Andrzej Hajda
2017-02-03 6:38 ` Inki Dae
2017-02-03 6:39 ` Inki Dae
[not found] ` <CGME20170120065231eucas1p23fa4730d36c855bc441ba23411ab6ffd@eucas1p2.samsung.com>
2017-01-20 6:52 ` [PATCH 5/7] drm/exynos/decon5433: add support for interlace modes Andrzej Hajda
[not found] ` <CGME20170120065231eucas1p121d2a987695fdce00e1b2bba445f1818@eucas1p1.samsung.com>
2017-01-20 6:52 ` [PATCH 6/7] drm/exynos/decon5433: signal vblank only on odd fields Andrzej Hajda
2017-01-20 13:55 ` Ville Syrjälä
2017-01-23 9:15 ` Andrzej Hajda
2017-01-25 14:06 ` Ville Syrjälä
2017-01-26 8:22 ` Andrzej Hajda
2017-01-26 10:42 ` Ville Syrjälä
[not found] ` <CGME20170120065232eucas1p170340d5a71e89db7c08d7218adbe4c2c@eucas1p1.samsung.com>
2017-01-20 6:52 ` [PATCH 7/7] arm64: dts: exynos: configure TV path clocks for Ultra HD modes Andrzej Hajda
2017-01-20 14:51 ` Krzysztof Kozlowski
[not found] ` <CGME20170123075623eucas1p19a1edd12eec91abdbbf786b308f65051@eucas1p1.samsung.com>
2017-01-23 7:56 ` [PATCH v2 " Andrzej Hajda
2017-01-23 9:08 ` Marek Szyprowski
[not found] ` <CGME20170123100557eucas1p28174748d64c4e8503a2006a9c5b554a6@eucas1p2.samsung.com>
2017-01-23 10:05 ` [PATCH v3 " Andrzej Hajda
2017-01-23 16:35 ` Krzysztof Kozlowski
2017-01-20 14:49 ` [PATCH 0/7] drm/exynos: add Ultra HD and interlace modes support to Exynos5433 Krzysztof Kozlowski
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