From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751598AbdATGwy (ORCPT ); Fri, 20 Jan 2017 01:52:54 -0500 Received: from mailout3.w1.samsung.com ([210.118.77.13]:55574 "EHLO mailout3.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751440AbdATGwp (ORCPT ); Fri, 20 Jan 2017 01:52:45 -0500 X-AuditID: cbfec7f4-f79716d000006f65-70-5881b3b0fda4 From: Andrzej Hajda To: Inki Dae , dri-devel@lists.freedesktop.org, Krzysztof Kozlowski Cc: Andrzej Hajda , Bartlomiej Zolnierkiewicz , Marek Szyprowski , Kyungmin Park , linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH 7/7] arm64: dts: exynos: configure TV path clocks for Ultra HD modes Date: Fri, 20 Jan 2017 07:52:25 +0100 Message-id: <1484895145-511-8-git-send-email-a.hajda@samsung.com> X-Mailer: git-send-email 2.7.4 In-reply-to: <1484895145-511-1-git-send-email-a.hajda@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrLIsWRmVeSWpSXmKPExsWy7djP87obNjdGGFzdLWdxa905VouNM9az Wlz5+p7NYtL9CSwW589vYLc42/SG3eLyrjlsFjPO72OyWHvkLrsDp8emVZ1sHve7jzN59G1Z xejxeZNcAEsUl01Kak5mWWqRvl0CV8bnG5NZC2ZxVhz8/5GlgfEHexcjJ4eEgInE0uk3mCFs MYkL99azdTFycQgJLGWUOH/nHyOE85lR4tmTu0wwHbOnt7FDJJYxSvSungqWEBL4zyhx7Y4u iM0moCnxd/NNNhBbRCBX4uTXI2BjmQX+MErcvLMUaCwHh7BAmMSOrZUgNSwCqhLTd34CO4lX wFFixYfXbBDL5CRunutkBinnFHCS2LsoHWSMhMBvNonrd6eygcQlBGQlNh2A+sBF4sCKh1B3 Cku8Or4F6ksZic6Og0wQvd2MEp/6T7BDOFMYJf59mAHVbS1x+PhFVhCbWYBPYtK26cwQC3gl OtqEIEwPiSk9VhDVjhKrHn+DhtZURol1E2cwTWCUWcDIsIpRJLW0ODc9tdhErzgxt7g0L10v OT93EyMwkk//O/5lB+PiY1aHGAU4GJV4eBOONUQIsSaWFVfmHmKU4GBWEuHtWd8YIcSbklhZ lVqUH19UmpNafIhRmoNFSZx3z4Ir4UIC6YklqdmpqQWpRTBZJg5OqQbGmgNKOw30Gzl+eFc8 vyU5b0m/UOOsy8krNRlzu8uCA1/WF+/auLaiv//j9e9hawQVLEzuv4yx2fFLKUtC40HKGctZ M5c5Tp7y/4fXL5mZ7CE8WjVH5/UJMucpTuwonfSX74/22t5XZgtLLrY7qzLv2dJalbucb9t0 tdCfakvVZ4c7OfZeDW1XYinOSDTUYi4qTgQAh3aiDeACAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrHLMWRmVeSWpSXmKPExsVy+t/xa7qvNzdGGGztYbW4te4cq8XGGetZ La58fc9mMen+BBaL8+c3sFucbXrDbnF51xw2ixnn9zFZrD1yl92B02PTqk42j/vdx5k8+ras YvT4vEkugCXKzSYjNTEltUghNS85PyUzL91WKTTETddCSSEvMTfVVilC1zckSEmhLDGnFMgz MkADDs4B7sFK+nYJbhmfb0xmLZjFWXHw/0eWBsYf7F2MnBwSAiYSs6e3QdliEhfurWfrYuTi EBJYwijRtG4XK4TTyCTxZfNGsCo2AU2Jv5tvsoHYIgK5EuufzmQHKWIW+McoseHqGyaQhLBA mETn++1gRSwCqhLTd34Ca+YVcJRY8eE1G8Q6OYmb5zqZuxg5ODgFnCT2LkoHCQsBlRxsPsA2 gZF3ASPDKkaR1NLi3PTcYkO94sTc4tK8dL3k/NxNjMCw3nbs5+YdjJc2Bh9iFOBgVOLhTTjW ECHEmlhWXJl7iFGCg1lJhLdnfWOEEG9KYmVValF+fFFpTmrxIUZToJsmMkuJJucDYy6vJN7Q xNDc0tDI2MLC3MhISZy35MOVcCGB9MSS1OzU1ILUIpg+Jg5OqQZG7lfmhouuMjhypcs4c3Ix Hlq7q/1f4vOYZuPI8iXrzEomcW01rjm/fNmhBycd9jn9SrKPkO3dcvTnz91ayz7Xzz/59ojs omX73bVKP/cruyXNW8c8y9RNf9MTjuKOrLkvjy+e0KllfULtDMuEFQsebk98s4D/6qf5ZYUK vVI/D9tNvjLXMOT0KSWW4oxEQy3mouJEAGqoerKBAgAA X-MTR: 20000000000000000@CPGS X-CMS-MailID: 20170120065232eucas1p170340d5a71e89db7c08d7218adbe4c2c X-Msg-Generator: CA X-Sender-IP: 182.198.249.179 X-Local-Sender: =?UTF-8?B?QW5kcnplaiBIYWpkYRtTUlBPTC1LZXJuZWwgKFRQKRvsgrw=?= =?UTF-8?B?7ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?UTF-8?B?QW5kcnplaiBIYWpkYRtTUlBPTC1LZXJuZWwgKFRQKRtTYW1z?= =?UTF-8?B?dW5nIEVsZWN0cm9uaWNzG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Sender-Code: =?UTF-8?B?QzEwG0VIURtDMTBDRDAyQ0QwMjczOTI=?= CMS-TYPE: 201P X-HopCount: 7 X-CMS-RootMailID: 20170120065232eucas1p170340d5a71e89db7c08d7218adbe4c2c X-RootMTR: 20170120065232eucas1p170340d5a71e89db7c08d7218adbe4c2c References: <1484895145-511-1-git-send-email-a.hajda@samsung.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Ultra HD modes requires clock ticking at increased rate. Signed-off-by: Andrzej Hajda --- arch/arm64/boot/dts/exynos/exynos5433.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi index f120d99..314d928 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi @@ -764,6 +764,9 @@ clock-names = "pclk", "aclk_decon", "aclk_smmu_decon0x", "aclk_xiu_decon0x", "pclk_smmu_decon0x", "sclk_decon_vclk", "sclk_decon_eclk"; + assigned-clocks = <&cmu_mif CLK_MOUT_SCLK_DECON_TV_ECLK_A>, <&cmu_mif CLK_DIV_SCLK_DECON_TV_ECLK>, <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK_USER>, <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK>; + assigned-clock-parents = <&cmu_mif CLK_MOUT_BUS_PLL_DIV2>, <0>, <&cmu_mif CLK_SCLK_DECON_TV_ECLK_DISP>, <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK_USER>; + assigned-clock-rates = <0>, <400000000>; samsung,disp-sysreg = <&syscon_disp>; interrupt-names = "fifo", "vsync", "lcd_sys"; interrupts = , -- 2.7.4