From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751767AbdBHXRZ (ORCPT ); Wed, 8 Feb 2017 18:17:25 -0500 Received: from mail-wr0-f172.google.com ([209.85.128.172]:35261 "EHLO mail-wr0-f172.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750946AbdBHXRX (ORCPT ); Wed, 8 Feb 2017 18:17:23 -0500 From: Daniel Lezcano To: tglx@linutronix.de Cc: David Engraf , Nicolas Ferre , linux-arm-kernel@lists.infradead.org (moderated list:ATMEL Timer Counter (TC) AND CLOCKSOURCE DRIVERS), linux-kernel@vger.kernel.org (open list:CLOCKSOURCE, CLOCKEVENT DRIVERS) Subject: [PATCH 04/10] clocksource/drivers/tcb_clksrc: Use 32 bit tcb as sched_clock Date: Thu, 9 Feb 2017 00:14:38 +0100 Message-Id: <1486595685-10232-4-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1486595685-10232-1-git-send-email-daniel.lezcano@linaro.org> References: <20170208231208.GB12695@mai> <1486595685-10232-1-git-send-email-daniel.lezcano@linaro.org> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: David Engraf On newer boards the TC can be read as single 32 bit value without locking. Thus the clock can be used as reference for sched_clock which is much more accurate than the jiffies implementation. Tested on a Atmel SAMA5D2 board. Signed-off-by: David Engraf Acked-by: Nicolas Ferre Signed-off-by: Daniel Lezcano --- drivers/clocksource/tcb_clksrc.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/drivers/clocksource/tcb_clksrc.c b/drivers/clocksource/tcb_clksrc.c index d4ca996..745844e 100644 --- a/drivers/clocksource/tcb_clksrc.c +++ b/drivers/clocksource/tcb_clksrc.c @@ -10,6 +10,7 @@ #include #include #include +#include /* @@ -56,11 +57,16 @@ static u64 tc_get_cycles(struct clocksource *cs) return (upper << 16) | lower; } -static u64 tc_get_cycles32(struct clocksource *cs) +static u32 tc_get_cv32(void) { return __raw_readl(tcaddr + ATMEL_TC_REG(0, CV)); } +static u64 tc_get_cycles32(struct clocksource *cs) +{ + return tc_get_cv32(); +} + static struct clocksource clksrc = { .name = "tcb_clksrc", .rating = 200, @@ -69,6 +75,11 @@ static struct clocksource clksrc = { .flags = CLOCK_SOURCE_IS_CONTINUOUS, }; +static u64 notrace tc_read_sched_clock(void) +{ + return tc_get_cv32(); +} + #ifdef CONFIG_GENERIC_CLOCKEVENTS struct tc_clkevt_device { @@ -339,6 +350,9 @@ static int __init tcb_clksrc_init(void) clksrc.read = tc_get_cycles32; /* setup ony channel 0 */ tcb_setup_single_chan(tc, best_divisor_idx); + + /* register sched_clock on chips with single 32 bit counter */ + sched_clock_register(tc_read_sched_clock, 32, divided_rate); } else { /* tclib will give us three clocks no matter what the * underlying platform supports. -- 2.7.4