From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752200AbdBMLGl (ORCPT ); Mon, 13 Feb 2017 06:06:41 -0500 Received: from regular1.263xmail.com ([211.150.99.130]:49201 "EHLO regular1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751472AbdBMLGj (ORCPT ); Mon, 13 Feb 2017 06:06:39 -0500 X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-RL-SENDER: andy.yan@rock-chips.com X-FST-TO: robh+dt@kernel.org X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: andy.yan@rock-chips.com X-UNIQUE-TAG: <1de73d408ea6eb4eba2b1d0410be1150> X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 From: Andy Yan To: robh+dt@kernel.org, heiko@sntech.de, linus.walleij@linaro.org, devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Andy Yan Subject: [PATCH 4/7] dt-bindings: rockchip,pinctrl: rename RK1108 to RV1108 Date: Mon, 13 Feb 2017 19:06:23 +0800 Message-Id: <1486983983-32506-1-git-send-email-andy.yan@rock-chips.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1486983566-32265-1-git-send-email-andy.yan@rock-chips.com> References: <1486983566-32265-1-git-send-email-andy.yan@rock-chips.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Rockchip finally named the SOC as RV1108, so change it. Also move the compatible list to one compatible per line. Signed-off-by: Andy Yan --- .../devicetree/bindings/pinctrl/rockchip,pinctrl.txt | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt index 4722bc6..a4f3ef2 100644 --- a/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt @@ -19,11 +19,17 @@ The pins are grouped into up to 5 individual pin banks which need to be defined as gpio sub-nodes of the pinmux controller. Required properties for iomux controller: - - compatible: one of "rockchip,rk1108-pinctrl", "rockchip,rk2928-pinctrl" - "rockchip,rk3066a-pinctrl", "rockchip,rk3066b-pinctrl" - "rockchip,rk3188-pinctrl", "rockchip,rk3228-pinctrl" - "rockchip,rk3288-pinctrl", "rockchip,rk3368-pinctrl" - "rockchip,rk3399-pinctrl" + - compatible: should be + "rockchip,rv1108-pinctrl": for Rockchip RV1108 + "rockchip,rk2928-pinctrl": for Rockchip RK2928 + "rockchip,rk3066a-pinctrl": for Rockchip RK3066a + "rockchip,rk3066b-pinctrl": for Rockchip RK3066b + "rockchip,rk3188-pinctrl": for Rockchip RK3188 + "rockchip,rk3228-pinctrl": for Rockchip RK3228 + "rockchip,rk3288-pinctrl": for Rockchip RK3288 + "rockchip,rk3368-pinctrl": for Rockchip RK3368 + "rockchip,rk3399-pinctrl": for Rockchip RK3399 + - rockchip,grf: phandle referencing a syscon providing the "general register files" -- 2.7.4