From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753638AbdBNLGp (ORCPT ); Tue, 14 Feb 2017 06:06:45 -0500 Received: from conuserg-07.nifty.com ([210.131.2.74]:18734 "EHLO conuserg-07.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752113AbdBNLGM (ORCPT ); Tue, 14 Feb 2017 06:06:12 -0500 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-07.nifty.com v1EB5fJ9029754 X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: linux-mmc@vger.kernel.org Cc: Masahiro Yamada , linux-kernel@vger.kernel.org, Adrian Hunter , Ulf Hansson Subject: [PATCH] mmc: sdhci-cadence: fix bit shift of read data from PHY port Date: Tue, 14 Feb 2017 20:05:40 +0900 Message-Id: <1487070340-8988-1-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This macro is currently unused, but it may be useful for debug use. Fix it just in case. Fixes: ff6af28faff5 ("mmc: sdhci-cadence: add Cadence SD4HC support") Signed-off-by: Masahiro Yamada --- drivers/mmc/host/sdhci-cadence.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-cadence.c b/drivers/mmc/host/sdhci-cadence.c index 4b0ecb9..5ffa2e5 100644 --- a/drivers/mmc/host/sdhci-cadence.c +++ b/drivers/mmc/host/sdhci-cadence.c @@ -25,7 +25,7 @@ #define SDHCI_CDNS_HRS04_ACK BIT(26) #define SDHCI_CDNS_HRS04_RD BIT(25) #define SDHCI_CDNS_HRS04_WR BIT(24) -#define SDHCI_CDNS_HRS04_RDATA_SHIFT 12 +#define SDHCI_CDNS_HRS04_RDATA_SHIFT 16 #define SDHCI_CDNS_HRS04_WDATA_SHIFT 8 #define SDHCI_CDNS_HRS04_ADDR_SHIFT 0 -- 2.7.4