From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754114AbdCBQAW (ORCPT ); Thu, 2 Mar 2017 11:00:22 -0500 Received: from mga09.intel.com ([134.134.136.24]:23532 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752730AbdCBP6l (ORCPT ); Thu, 2 Mar 2017 10:58:41 -0500 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.35,232,1484035200"; d="scan'208";a="1137043297" From: matthew.gerlach@linux.intel.com To: atull@opensource.altera.com, moritz.fischer@ettus.com, linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, robh+dt@kernel.org, mark.rutland@arm.com Cc: Matthew Gerlach Subject: [PATCH v4 3/4] fpga dt: bindings for Altera Partial Reconfiguration IP. Date: Thu, 2 Mar 2017 07:57:11 -0800 Message-Id: <1488470232-20412-4-git-send-email-matthew.gerlach@linux.intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1488470232-20412-1-git-send-email-matthew.gerlach@linux.intel.com> References: <1488470232-20412-1-git-send-email-matthew.gerlach@linux.intel.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Matthew Gerlach Device Tree bindings for Altera Partial Reconfiguration IP. v3: s/altr,pr-ip/altr,a10-pr-ip/ v2: s/Reconfiguraion/Reconfiguration/ ==================== Signed-off-by: Matthew Gerlach --- Documentation/devicetree/bindings/fpga/altera-pr-ip.txt | 12 ++++++++++++ 1 file changed, 12 insertions(+) create mode 100644 Documentation/devicetree/bindings/fpga/altera-pr-ip.txt diff --git a/Documentation/devicetree/bindings/fpga/altera-pr-ip.txt b/Documentation/devicetree/bindings/fpga/altera-pr-ip.txt new file mode 100644 index 0000000..52a294c --- /dev/null +++ b/Documentation/devicetree/bindings/fpga/altera-pr-ip.txt @@ -0,0 +1,12 @@ +Altera Arria10 Partial Reconfiguration IP + +Required properties: +- compatible : should contain "altr,a10-pr-ip" +- reg : base address and size for memory mapped io. + +Example: + + fpga_mgr: fpga-mgr@ff20c000 { + compatible = "altr,a10-pr-ip"; + reg = <0xff20c000 0x10>; + }; -- 2.7.4