From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932130AbdC1KMX (ORCPT ); Tue, 28 Mar 2017 06:12:23 -0400 Received: from regular1.263xmail.com ([211.150.99.135]:58963 "EHLO regular1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754742AbdC1KMR (ORCPT ); Tue, 28 Mar 2017 06:12:17 -0400 X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-RL-SENDER: zhangqing@rock-chips.com X-FST-TO: heiko@sntech.de X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: zhangqing@rock-chips.com X-UNIQUE-TAG: <3906363e28a8d2bddb25a622e0cbc58d> X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 From: Elaine Zhang To: heiko@sntech.de, xf@rock-chips.com Cc: mturquette@baylibre.com, sboyd@codeaurora.org, linux-clk@vger.kernel.org, huangtao@rock-chips.com, xxx@rock-chips.com, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Elaine Zhang Subject: [PATCH v2 2/4] clk: rockchip: rk3228: make noc and some special clk as critical_clocks Date: Tue, 28 Mar 2017 18:06:52 +0800 Message-Id: <1490695614-3220-3-git-send-email-zhangqing@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1490695614-3220-1-git-send-email-zhangqing@rock-chips.com> References: <1490695614-3220-1-git-send-email-zhangqing@rock-chips.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Signed-off-by: Elaine Zhang --- drivers/clk/rockchip/clk-rk3228.c | 30 +++++++++++++++++++++++++++++- 1 file changed, 29 insertions(+), 1 deletion(-) diff --git a/drivers/clk/rockchip/clk-rk3228.c b/drivers/clk/rockchip/clk-rk3228.c index db6e5a9e6de6..4d3203f887e2 100644 --- a/drivers/clk/rockchip/clk-rk3228.c +++ b/drivers/clk/rockchip/clk-rk3228.c @@ -445,7 +445,7 @@ enum rk3228_plls { RK2928_CLKGATE_CON(2), 12, GFLAGS, &rk3228_spdif_fracmux), - GATE(0, "jtag", "ext_jtag", 0, + GATE(0, "jtag", "ext_jtag", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(1), 3, GFLAGS), GATE(0, "sclk_otgphy0", "xin24m", 0, @@ -644,9 +644,37 @@ enum rk3228_plls { static const char *const rk3228_critical_clocks[] __initconst = { "aclk_cpu", + "pclk_cpu", + "hclk_cpu", "aclk_peri", "hclk_peri", "pclk_peri", + "aclk_rga_noc", + "aclk_iep_noc", + "aclk_vop_noc", + "aclk_hdcp_noc", + "hclk_vio_ahb_arbi", + "hclk_vio_noc", + "hclk_vop_noc", + "hclk_host0_arb", + "hclk_host1_arb", + "hclk_host2_arb", + "hclk_otg_pmu", + "aclk_gpu_noc", + "sclk_initmem_mbist", + "aclk_initmem", + "hclk_rom", + "pclk_ddrupctl", + "pclk_ddrmon", + "pclk_msch_noc", + "pclk_stimer", + "pclk_ddrphy", + "pclk_acodecphy", + "pclk_phy_noc", + "aclk_vpu_noc", + "aclk_rkvdec_noc", + "hclk_vpu_noc", + "hclk_rkvdec_noc", }; static void __init rk3228_clk_init(struct device_node *np) -- 1.9.1