From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752052AbdEBHJq (ORCPT ); Tue, 2 May 2017 03:09:46 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:65031 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1751026AbdEBHJo (ORCPT ); Tue, 2 May 2017 03:09:44 -0400 Message-ID: <1493708978.6464.37.camel@mtkswgap22> Subject: Re: FW: [PATCH 2/2] dt-bindings: pcie: Add documentation for Mediatek PCIe From: Ryder Lee To: Arnd Bergmann CC: Rob Herring , , , , , Bjorn Helgaas , Date: Tue, 2 May 2017 15:09:38 +0800 In-Reply-To: <4BAFE512E7223A4B91F29C40AC7A579616B5155E@MTKMBS05N1.mediatek.inc> References: <1492935543-18190-1-git-send-email-ryder.lee@mediatek.com> <1492935543-18190-3-git-send-email-ryder.lee@mediatek.com> <1493194205.27023.80.camel@mtkswgap22> <1493347596.29314.55.camel@mtkswgap22> <4BAFE512E7223A4B91F29C40AC7A579616B5155E@MTKMBS05N1.mediatek.inc> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.2.3-0ubuntu6 Content-Transfer-Encoding: 7bit MIME-Version: 1.0 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Arnd, > 2017-04-28 19:41 GMT+08:00 Arnd Bergmann : > > On Fri, Apr 28, 2017 at 4:46 AM, Ryder Lee > wrote: > > On Thu, 2017-04-27 at 21:06 +0200, Arnd Bergmann wrote: > >> On Wed, Apr 26, 2017 at 10:10 AM, Ryder Lee > wrote: > >> > On Tue, 2017-04-25 at 14:18 +0200, Arnd Bergmann wrote: > >> >> On Sun, Apr 23, 2017 at 10:19 AM, Ryder Lee > wrote: > >> Are any of the registers the same at all, e.g. for MSI > handling? > > > > No, It doesn't support MSI. All I can do is using the > registers that designer provide to me. The others are inviable > for software. So I treat it as different hardware. > Furthermore, we hope that we can put all mediatek drivers > together regardless of in-house IP or lincense IP > > > > We have no particular IP name but just use chip name to call > it. So I will temporarily use "mediatek,gen2v1-pcie" in patch > v1. > > I think using the chip name as in the first version of your > patch name is better then, in particular since the 'gen2v1' > would not be an actual version number but just say which > variant got merged into mainline first. Okay, i will correct it. > A related question would be on how general we want the binding > to be. > Your binding text starts out by describing that there are > three root ports and what their capabilities are. > > If you think there might be other (existing or future) chips > that use the same binding and driver, then being a little more > abstract could help in the long run. Thanks for reminding me. If we decide to use the same driver in the future, we will have a internal discussion about it. Ryder.