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From: Geetha sowjanya <gakula@caviumnetworks.com>
To: will.deacon@arm.com, robin.murphy@arm.com,
	lorenzo.pieralisi@arm.com, hanjun.guo@linaro.org,
	sudeep.holla@arm.com, iommu@lists.linux-foundation.org
Cc: jcm@redhat.com, linux-kernel@vger.kernel.org,
	robert.richter@cavium.com, catalin.marinas@arm.com,
	sgoutham@cavium.com, linux-arm-kernel@lists.infradead.org,
	linux-acpi@vger.kernel.org, geethasowjanya.akula@gmail.com,
	linu.cherian@cavium.com, Charles.Garcia-Tobin@arm.com,
	Geetha Sowjanya <geethasowjanya.akula@cavium.com>
Subject: [PATCH v2 4/7] iommu/arm-smmu-v3: For ACPI based device probing, set  PAGE0_REGS_ONLY option for ThunderX2 SMMUv3 implementation.
Date: Thu,  4 May 2017 18:05:36 +0530	[thread overview]
Message-ID: <1493901339-14929-5-git-send-email-gakula@caviumnetworks.com> (raw)
In-Reply-To: <1493901339-14929-1-git-send-email-gakula@caviumnetworks.com>

From: Linu Cherian <linu.cherian@cavium.com>

Enable PAGE0_REGS_ONLY option for Cavium ThunderX2 SMMUv3 model.

Signed-off-by: Linu Cherian <linu.cherian@cavium.com>
Signed-off-by: Geetha Sowjanya <geethasowjanya.akula@cavium.com>
---
 drivers/iommu/arm-smmu-v3.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
index f027676..8f7d8ad 100644
--- a/drivers/iommu/arm-smmu-v3.c
+++ b/drivers/iommu/arm-smmu-v3.c
@@ -2625,6 +2625,14 @@ static int arm_smmu_device_hw_probe(struct arm_smmu_device *smmu)
 }
 
 #ifdef CONFIG_ACPI
+static void acpi_smmu_get_options(u32 model, struct arm_smmu_device *smmu)
+{
+	if (model == ACPI_IORT_SMMU_V3_CAVIUM_CN99XX)
+		smmu->options |= ARM_SMMU_OPT_PAGE0_REGS_ONLY;
+
+	dev_notice(smmu->dev, "option mask 0x%x\n", smmu->options);
+}
+
 static int arm_smmu_device_acpi_probe(struct platform_device *pdev,
 				      struct arm_smmu_device *smmu)
 {
@@ -2637,6 +2645,8 @@ static int arm_smmu_device_acpi_probe(struct platform_device *pdev,
 	/* Retrieve SMMUv3 specific data */
 	iort_smmu = (struct acpi_iort_smmu_v3 *)node->node_data;
 
+	acpi_smmu_get_options(iort_smmu->model, smmu);
+
 	if (iort_smmu->flags & ACPI_IORT_SMMU_V3_COHACC_OVERRIDE)
 		smmu->features |= ARM_SMMU_FEAT_COHERENCY;
 
-- 
1.8.3.1

  parent reply	other threads:[~2017-05-04 12:55 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-04 12:35 [PATCH v2 0/7] Cavium ThunderX2 SMMUv3 errata workarounds Geetha sowjanya
2017-05-04 12:35 ` [PATCH v2 1/7] iommu/arm-smmu-v3: Introduce SMMU option PAGE0_REGS_ONLY Geetha sowjanya
2017-05-04 16:32   ` Mark Rutland
2017-05-04 12:35 ` [PATCH v2 2/7] iommu/arm-smmu-v3: Do resource size checks based on SMMU Geetha sowjanya
2017-05-04 12:35 ` [PATCH v2 3/7] ACPICA: IORT: Add Cavium ThunderX2 SMMUv3 model definition Geetha sowjanya
2017-05-04 12:35 ` Geetha sowjanya [this message]
2017-05-04 12:35 ` [PATCH v2 5/7] ACPI/IORT: Fixup SMMUv3 resource size for Cavium ThunderX2 SMMUv3 model Geetha sowjanya
2017-05-04 12:35 ` [PATCH v2 6/7] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #126 Geetha sowjanya
2017-05-04 12:35 ` [PATCH v2 7/7] arm64: Documentation: Add Cavium ThunderX2 SMMUv3 erratas Geetha sowjanya

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