From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932151AbdEQSXu (ORCPT ); Wed, 17 May 2017 14:23:50 -0400 Received: from mail-out.m-online.net ([212.18.0.9]:41381 "EHLO mail-out.m-online.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751398AbdEQSXs (ORCPT ); Wed, 17 May 2017 14:23:48 -0400 X-Auth-Info: YUkX8eZP2SxKNeSGaedRoVpQCqIG7joopr9C6NEjhf8= From: Anatolij Gustschin To: stillcompiling@gmail.com, joshua.clayton@uniwest.com, bst@pengutronix.de Cc: linux-fpga@vger.kernel.org, atull@kernel.org, moritz.fischer@ettus.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, robh+dt@kernel.org, mark.rutland@arm.com Subject: [PATCH v10 1/3] doc: dt: add altera-ps-spi binding document Date: Wed, 17 May 2017 20:23:40 +0200 Message-Id: <1495045422-19183-1-git-send-email-agust@denx.de> X-Mailer: git-send-email 2.7.4 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Joshua Clayton Describe an altera-ps-spi devicetree entry, required features Signed-off-by: Joshua Clayton Acked-by: Rob Herring Signed-off-by: Anatolij Gustschin --- Changes in v10: - fix compatible string in example - add Arria 10 compatible - s/spi/SPI/ - reword to remove entries mentioning cyclone, since it can be used with other FPGAs now (Arria 10, Stratix V) .../bindings/fpga/altera-passive-serial.txt | 29 ++++++++++++++++++++++ 1 file changed, 29 insertions(+) create mode 100644 Documentation/devicetree/bindings/fpga/altera-passive-serial.txt diff --git a/Documentation/devicetree/bindings/fpga/altera-passive-serial.txt b/Documentation/devicetree/bindings/fpga/altera-passive-serial.txt new file mode 100644 index 0000000..3e240b2 --- /dev/null +++ b/Documentation/devicetree/bindings/fpga/altera-passive-serial.txt @@ -0,0 +1,29 @@ +Altera Passive Serial SPI FPGA Manager + +Altera FPGAs support a method of loading the bitstream over what is +referred to as "passive serial". +The passive serial link is not technically SPI, and might require extra +circuits in order to play nicely with other SPI slaves on the same bus. + +See https://www.altera.com/literature/hb/cyc/cyc_c51013.pdf + +Required properties: +- compatible: Must be one of the following: + "altr,fpga-passive-serial", + "altr,fpga-arria10-passive-serial" +- reg: SPI chip select of the FPGA +- nconfig-gpios: config pin (referred to as nCONFIG in the manual) +- nstat-gpios: status pin (referred to as nSTATUS in the manual) + +Optional properties: +- confd-gpios: confd pin (referred to as CONF_DONE in the manual) + +Example: + fpga_spi: evi-fpga-spi@0 { + compatible = "altr,fpga-passive-serial"; + spi-max-frequency = <20000000>; + reg = <0>; + nconfig-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>; + nstat-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>; + confd-gpios = <&gpio4 12 GPIO_ACTIVE_LOW>; + }; -- 2.7.4