From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754857AbdERCOK (ORCPT ); Wed, 17 May 2017 22:14:10 -0400 Received: from regular1.263xmail.com ([211.150.99.130]:34133 "EHLO regular1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753397AbdERCOI (ORCPT ); Wed, 17 May 2017 22:14:08 -0400 X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-RL-SENDER: zhangqing@rock-chips.com X-FST-TO: heiko@sntech.de X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: zhangqing@rock-chips.com X-UNIQUE-TAG: <005f1c2019bceb40e760131d9da6d73a> X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 From: Elaine Zhang To: heiko@sntech.de, xf@rock-chips.com Cc: linux-clk@vger.kernel.org, huangtao@rock-chips.com, xxx@rock-chips.com, cl@rock-chips.com, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, robh+dt@kernel.org, mark.rutland@arm.com, mturquette@baylibre.com, sboyd@codeaurora.org, zhengxing@rock-chips.com, Elaine Zhang Subject: [PATCH v2 0/3] clk: rockchip: support clk controller for RK3128 SoC Date: Thu, 18 May 2017 10:16:56 +0800 Message-Id: <1495073819-4160-1-git-send-email-zhangqing@rock-chips.com> X-Mailer: git-send-email 1.9.1 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The driver and clk ID\SRST ID it's also applies to the RK3126 SoC. change in V2: rename the rk312x to rk3128. Elaine Zhang (3): clk: rockchip: add dt-binding header for rk3128 dt-bindings: add bindings for rk3128 clock controller clk: rockchip: add clock controller for rk3128 .../bindings/clock/rockchip,rk3128-cru.txt | 56 ++ drivers/clk/rockchip/Makefile | 1 + drivers/clk/rockchip/clk-rk3128.c | 612 +++++++++++++++++++++ include/dt-bindings/clock/rk3128-cru.h | 281 ++++++++++ 4 files changed, 950 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.txt create mode 100644 drivers/clk/rockchip/clk-rk3128.c create mode 100644 include/dt-bindings/clock/rk3128-cru.h -- 1.9.1