From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751637AbdFIMxE (ORCPT ); Fri, 9 Jun 2017 08:53:04 -0400 Received: from out1-smtp.messagingengine.com ([66.111.4.25]:50747 "EHLO out1-smtp.messagingengine.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751556AbdFIMxD (ORCPT ); Fri, 9 Jun 2017 08:53:03 -0400 X-ME-Sender: X-Sasl-enc: ggxzHcS+3FrtgTWkUA3A6NaoOe4UrwIe4y74fpWi0mEH 1497012781 Message-ID: <1497012772.23335.12.camel@aj.id.au> Subject: Re: [PATCH] arm: aspeed: Add Aspeed board file with clocksource devicetree fixup From: Andrew Jeffery To: Arnd Bergmann Cc: Daniel Lezcano , Joel Stanley , Linux ARM , Linux Kernel Mailing List , Linus Walleij Date: Fri, 09 Jun 2017 22:22:52 +0930 In-Reply-To: References: <20170609073037.21871-1-andrew@aj.id.au> Content-Type: multipart/signed; micalg="pgp-sha512"; protocol="application/pgp-signature"; boundary="=-avsyPN3cyHHTQCRAK7WX" X-Mailer: Evolution 3.22.6-1ubuntu1 Mime-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --=-avsyPN3cyHHTQCRAK7WX Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, 2017-06-09 at 11:19 +0200, Arnd Bergmann wrote: > > On Fri, Jun 9, 2017 at 9:30 AM, Andrew Jeffery wrote: > > Add the clock-names property in init_timer() to work-around Aspeed > > devicetrees from times prior to merging the Moxart/Aspeed and Faraday > > drivers. > >=20 > > > > Signed-off-by: Andrew Jeffery > > --- > > Well, here's an implementation I knocked up. It's a fair chunk of code = for > > marginal benefit. Joel is against it. > >=20 > > At least it's something to debate. > >=20 > > Tested under QEMU for both AST2400 and AST2500 SoCs. >=20 > Right, I think having the one-line fixup in the driver makes way more sen= se > here, and that is what we usually do, but we could do this if Daniel has = good > reasons to keep the driver free of backwards-compatibility support. Yeah, choosing between the two with no further information I'd prefer adding support to the driver. >=20 > It also depends a bit on how common the old binding version already > is, and if anyone is shipping systems with that. So the fttmr010 bindings describe the clocks and clock-names properties as optional (a little confusingly, "Optionally required properties").=20 I guess keeping in mind the bindings describe the hardware and not the driver this might be reasonable, but the driver fails init if they're not present. arch/arm/boot/dts/moxart.dtsi doesn't specify clock-names either so I would have thought systems based on it would also fail. However, Linus' fttmr010 series has Tested-by tags from Jonas, so maybe I've missed something. Regardless, if it's the case that Moxa systems now fail to init the clocksource then the Aspeed-specific init_time() solution is even less attractive. moxart.dtsi dates back to December 2013 ("448e7edefa92 ARM: moxart: add MOXA ART SoC device tree files"). The old binding is less of a problem for Aspeed systems as we don't yet have a clk driver upstream. Joel only recently added fixed-clock nodes in 4.12 so Aspeed systems could boot without DTS modifications. Andrew --=-avsyPN3cyHHTQCRAK7WX Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNATURE----- iQIcBAABCgAGBQJZOpokAAoJEJ0dnzgO5LT5wqoP/1wPiB3oXBofQUPQDsSAJyY3 j/U7Vf7dG9iojs8Vu0IKrK7ztaloSuSSCHGb/jsw04W3ERgpuZbLgKW8Xr/nbXIa vLP7j8slzGwwtLVMJCETbcRV9RlsDiPgcCS/UMLN8613Xz4YnawlEO/oNhONX62e PX2T256Z7GKTncLsfq5Ma6yhELYcAPUYVFT42MRvZQHrm7XxkAi6oJ0m5KKSfYjR EsE7L8eHCxQT6ytzrPuHHl/lNuUTi6aCNp8OI+dkkK0MTx2dyCdFBSYdCYlLcpJo /nq/KvqZfJS/m7zjpm8poW2GvrF/QBNlb8rZl4YaA/PMgwbT5gZEhaxKTGJjuntD mInkJ1RQCrlJHl35giVZDA6K9Ykm5gmfslpPqDHtkazUlwT3YBcTKrddtje0eweu a1QfzlArYmSjd55pEza4uKouggFt7JJ57Me6rXlbcotoB/OmruWGIQHROPqwocZM ycEaC5vaOdBI82Q7bfOMJa0IXIIjlXoBSG5gue261blEuY04OO1Jmi+GfrcAmqRX upCr4BBsSgO9SveUSjzMevGJobhFkiigWrxOjahtQWqoc2cJcRmBOjxsmZd8Ps7t 7CDHEC5CBqQT/4TWcVQN6o/Ljmmqb8uHUlX7VVRe387dT0OgbFroRL4KR6vSTemx t4JektAdyiUMGQuv873h =JwDI -----END PGP SIGNATURE----- --=-avsyPN3cyHHTQCRAK7WX--