From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754706AbdFLQWD (ORCPT ); Mon, 12 Jun 2017 12:22:03 -0400 Received: from mail-sn1nam01on0075.outbound.protection.outlook.com ([104.47.32.75]:43840 "EHLO NAM01-SN1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1754403AbdFLPhn (ORCPT ); Mon, 12 Jun 2017 11:37:43 -0400 Authentication-Results: spf=fail (sender IP is 192.88.168.50) smtp.mailfrom=nxp.com; nxp.com; dkim=none (message not signed) header.d=none;nxp.com; dmarc=fail action=none header.from=nxp.com; From: Dong Aisheng To: CC: , , , , , , , , , , , Dong Aisheng Subject: [PATCH V3 5/7] tty: serial: lpuart: add imx7ulp support Date: Mon, 12 Jun 2017 23:37:26 +0800 Message-ID: <1497281848-12995-6-git-send-email-aisheng.dong@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1497281848-12995-1-git-send-email-aisheng.dong@nxp.com> References: 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1;DM2PR0301MB0910;7:2R/fsQ5vFBSvUBEiTr49NPSZ2qh2C1o7gbL13XuWKVZn57Wg1vyMZCOVIqOCfcJ6YBl7bvMLbYAuftCSc3JCX7u0lrLSlGEvHKz9+v39+jIxjcuQgD+Kn5KotH81IeCG3M9jTmgcw4qlgVh77ofD1bAVTxfaFw34yjRp3FTV4H0Vg7CWvPT1tPNoUpFzdaocoOnDDEj7CkvlCxi64/evqJomF2sF5AJ1MTp99N5eudIpVAWoH1brkTR76tAOxseUSOQNxzCqyuYdff/MXwKGFNrH7DjSNYXxF0+51OT8iaYVkacZitULkghHpzTiA1fPGbVf1aCR6Q1LiGZIMUkTTg== X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Jun 2017 15:37:41.2500 (UTC) X-MS-Exchange-CrossTenant-Id: 5afe0b00-7697-4969-b663-5eab37d5f47e X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=5afe0b00-7697-4969-b663-5eab37d5f47e;Ip=[192.88.168.50];Helo=[tx30smr01.am.freescale.net] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM2PR0301MB0910 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The lpuart of imx7ulp is basically the same as ls1021a. It's also 32 bit width register, but unlike ls1021a, it's little endian. Besides that, imx7ulp lpuart has a minor different register layout from ls1021a that it has four extra registers (verid, param, global, pincfg) located at the beginning of register map, which are currently not used by the driver and less to be used later. To ease the register difference handling, we add a reg_off member in lpuart_soc_data structure to represent if the normal lpuart32_{read|write} requires plus a offset to hide the issue. Cc: Greg Kroah-Hartman Cc: Jiri Slaby Cc: Stefan Agner Cc: Mingkai Hu Cc: Yangbo Lu Cc: Fugang Duan Signed-off-by: Dong Aisheng --- ChangeLog: v2->v3: * use standard port->iotype to represent the endians. v1->v2: * remove lpuart_reg_off according to Stefan's suggestion --- drivers/tty/serial/fsl_lpuart.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c index bbf47a0..9d05e53 100644 --- a/drivers/tty/serial/fsl_lpuart.c +++ b/drivers/tty/serial/fsl_lpuart.c @@ -231,6 +231,9 @@ #define DEV_NAME "ttyLP" #define UART_NR 6 +/* IMX lpuart has four extra unused regs located at the beginning */ +#define IMX_REG_OFF 0x10 + struct lpuart_port { struct uart_port port; struct clk *clk; @@ -259,6 +262,7 @@ struct lpuart_port { struct lpuart_soc_data { char iotype; + u8 reg_off; }; static const struct lpuart_soc_data vf_data = { @@ -267,12 +271,17 @@ static const struct lpuart_soc_data vf_data = { static const struct lpuart_soc_data ls_data = { .iotype = UPIO_MEM32BE, +}; +static struct lpuart_soc_data imx_data = { + .iotype = UPIO_MEM32, + .reg_off = IMX_REG_OFF, }; static const struct of_device_id lpuart_dt_ids[] = { { .compatible = "fsl,vf610-lpuart", .data = &vf_data, }, { .compatible = "fsl,ls1021a-lpuart", .data = &ls_data, }, + { .compatible = "fsl,imx7ulp-lpuart", .data = &imx_data, }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, lpuart_dt_ids); @@ -2020,6 +2029,7 @@ static int lpuart_probe(struct platform_device *pdev) if (IS_ERR(sport->port.membase)) return PTR_ERR(sport->port.membase); + sport->port.membase += sdata->reg_off; sport->port.mapbase = res->start; sport->port.dev = &pdev->dev; sport->port.type = PORT_LPUART; -- 2.7.4