From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752571AbdFMGLB (ORCPT ); Tue, 13 Jun 2017 02:11:01 -0400 Received: from out4-smtp.messagingengine.com ([66.111.4.28]:49079 "EHLO out4-smtp.messagingengine.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752119AbdFMGK7 (ORCPT ); Tue, 13 Jun 2017 02:10:59 -0400 X-ME-Sender: X-Sasl-enc: HA2zuNg8LNif1XPt0L0H6rSjghqNzmI87lR0yFbiAp3j 1497334258 Message-ID: <1497334246.11158.4.camel@aj.id.au> Subject: Re: [PATCH 2/2] drivers/clocksource/fttmr010: Implement delay timer From: Andrew Jeffery To: Linus Walleij , Daniel Lezcano , Thomas Gleixner , Joel Stanley , Jonas Jensen Cc: Janos Laube , Paulius Zaleckas , linux-arm-kernel@lists.infradead.org, Hans Ulli Kroll , Florian Fainelli , linux-kernel@vger.kernel.org Date: Tue, 13 Jun 2017 15:40:46 +0930 In-Reply-To: <20170611212617.6906-2-linus.walleij@linaro.org> References: <20170611212617.6906-1-linus.walleij@linaro.org> <20170611212617.6906-2-linus.walleij@linaro.org> Content-Type: multipart/signed; micalg="pgp-sha512"; protocol="application/pgp-signature"; boundary="=-BJXFqad9QsFKUTL7ojnS" X-Mailer: Evolution 3.22.6-1ubuntu1 Mime-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --=-BJXFqad9QsFKUTL7ojnS Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Sun, 2017-06-11 at 23:26 +0200, Linus Walleij wrote: > This timer is often used on the ARM architecture, so as with so > many siblings, we can implement delay timers, removing the need > for the system to calibrate jiffys at boot, and potentially > handling CPU frequency scaling on targets. >=20 > We cannot just protect the Kconfig with a "depends on ARM" because > it is already known that different architectures are using Faraday > IP blocks, so it is better to make things open-ended and use Seems like we're missing the end of the sentence? >=20 > Result on boot dmesg: >=20 > Switching to timer-based delay loop, resolution 40n > Calibrating delay loop (skipped), value calculated using > =C2=A0 timer frequency.. 50.00 BogoMIPS (lpj=3D250000) >=20 > This is accurately the timer frequency, 250MHz on the APB > bus. >=20 > > Cc: Andrew Jeffery > > Cc: Joel Stanley > > Cc: Jonas Jensen > Signed-off-by: Linus Walleij Tried both patches on an AST2500, everything worked as suggested. Tested-by: Andrew Jeffery > --- > =C2=A0drivers/clocksource/timer-fttmr010.c | 35 +++++++++++++++++++++++++= +++++++++- > =C2=A01 file changed, 34 insertions(+), 1 deletion(-) >=20 > diff --git a/drivers/clocksource/timer-fttmr010.c b/drivers/clocksource/t= imer-fttmr010.c > index 5e82469995cb..0074d89cd2ce 100644 > --- a/drivers/clocksource/timer-fttmr010.c > +++ b/drivers/clocksource/timer-fttmr010.c > @@ -17,6 +17,7 @@ > =C2=A0#include > =C2=A0#include > =C2=A0#include > +#include > =C2=A0 > =C2=A0/* > =C2=A0 * Register definitions for the timers > @@ -81,9 +82,15 @@ struct fttmr010 { > > =C2=A0 bool count_down; > > =C2=A0 u32 t1_enable_val; > > =C2=A0 struct clock_event_device clkevt; > +#ifdef CONFIG_ARM > > + struct delay_timer delay_timer; > +#endif > =C2=A0}; > =C2=A0 > -/* A local singleton used by sched_clock, which is stateless */ > +/* > + * A local singleton used by sched_clock and delay timer reads, which ar= e > + * fast and stateless > + */ > =C2=A0static struct fttmr010 *local_fttmr; > =C2=A0 > =C2=A0static inline struct fttmr010 *to_fttmr010(struct clock_event_devic= e *evt) > @@ -101,6 +108,20 @@ static u64 notrace fttmr010_read_sched_clock_down(vo= id) > > =C2=A0 return ~readl(local_fttmr->base + TIMER2_COUNT); > =C2=A0} > =C2=A0 > +#ifdef CONFIG_ARM > + > +static unsigned long fttmr010_read_current_timer_up(void) > +{ > > + return readl(local_fttmr->base + TIMER2_COUNT); > +} > + > +static unsigned long fttmr010_read_current_timer_down(void) > +{ > > + return ~readl(local_fttmr->base + TIMER2_COUNT); > +} > + > +#endif > + > =C2=A0static int fttmr010_timer_set_next_event(unsigned long cycles, > > =C2=A0 =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0struct clock_event_= device *evt) > =C2=A0{ > @@ -349,6 +370,18 @@ static int __init fttmr010_timer_init(struct device_= node *np) > > =C2=A0 fttmr010->tick_rate, > > =C2=A0 1, 0xffffffff); > =C2=A0 > +#ifdef CONFIG_ARM > > + /* Also use this timer for delays */ > > + if (fttmr010->count_down) > > + fttmr010->delay_timer.read_current_timer =3D > > + fttmr010_read_current_timer_down; > > + else > > + fttmr010->delay_timer.read_current_timer =3D > > + fttmr010_read_current_timer_up; > > + fttmr010->delay_timer.freq =3D fttmr010->tick_rate; > > + register_current_timer_delay(&fttmr010->delay_timer); > +#endif > + > > =C2=A0 return 0; > =C2=A0 > =C2=A0out_unmap: --=-BJXFqad9QsFKUTL7ojnS Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNATURE----- iQIcBAABCgAGBQJZP4HmAAoJEJ0dnzgO5LT5020P/jzO+ooU578XYB3IrHHaK0pW Ap/StV2QOQ9MqGgOughlowTNrb7/y3Qk4XnxWobao30SH/eC3WL4u84g9RsTtQfU dz9Y6RPYVhbl1koy/S6tBLFTQHOQVp1dDelorxG22jeAaJEdSu9QhiLmE68Chyo8 5fjqngHo3kbzN6JXpEe0fj4jJAa5i7MLVlj5TiYnGzbc0oyJXr8jTqdQ8gh5u9lL MDHEIFc4r6o7R75HY5e44uLTdzv0mToctfZvH8D4qVstDiWm2cec57++9Q/ZG/qF xdqr2NcMudoHK20atynu9viunXJAlWf+Q1X6CdA/6Jnu49cmcUcSo9xbuSJRJfiV cvfu7VTb0Xania+x8xmoDl8Y60V0OVboToiMUr8GcVaNB/JTOvEfo1e67Le3UEAN YebGYl3/crLcuapB+GmS+KdBzNYoV7PHRvk224hGcCtOd6ETBNNvDExxFEYCWuRq CFBumLNsC7SdavPV7tbA/VB8DCZENIIpvGlCZs4Pa+zQRFr7XNoxgeDn0k6E2OaR /M90Ya8aUsYWhFb6kJn875QwzXhbVCyEwqkTNnZSt5cXDM/3PBFGAg39yV5XN5SH bjuYZc4RceVE24AlboM5q68CntYTf9GA1d0Y49e3pVxvWC/k/KtctsloEy3gEjz2 yiOuAiQLK9O0i6cq/BPg =cxFk -----END PGP SIGNATURE----- --=-BJXFqad9QsFKUTL7ojnS--