From: Ludovic Barre <ludovic.Barre@st.com>
To: Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>,
Marc Zyngier <marc.zyngier@arm.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@st.com>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>
Subject: [PATCH 4/8] irqchip: stm32: add stm32h7 support
Date: Fri, 7 Jul 2017 09:26:27 +0200 [thread overview]
Message-ID: <1499412391-25480-5-git-send-email-ludovic.Barre@st.com> (raw)
In-Reply-To: <1499412391-25480-1-git-send-email-ludovic.Barre@st.com>
From: Ludovic Barre <ludovic.barre@st.com>
stm32h7 has up to 96 input
(3 banks of 32 input max)
Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
---
drivers/irqchip/irq-stm32-exti.c | 42 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 42 insertions(+)
diff --git a/drivers/irqchip/irq-stm32-exti.c b/drivers/irqchip/irq-stm32-exti.c
index 308cef5..69ae09d 100644
--- a/drivers/irqchip/irq-stm32-exti.c
+++ b/drivers/irqchip/irq-stm32-exti.c
@@ -38,6 +38,39 @@ static struct stm32_exti_bank *stm32f4xx_exti_banks[] = {
&stm32f4xx_exti_b1,
};
+static struct stm32_exti_bank stm32h7xx_exti_b1 = {
+ .imr_ofst = 0x80,
+ .emr_ofst = 0x84,
+ .rtsr_ofst = 0x00,
+ .ftsr_ofst = 0x04,
+ .swier_ofst = 0x08,
+ .pr_ofst = 0x88,
+};
+
+static struct stm32_exti_bank stm32h7xx_exti_b2 = {
+ .imr_ofst = 0x90,
+ .emr_ofst = 0x94,
+ .rtsr_ofst = 0x20,
+ .ftsr_ofst = 0x24,
+ .swier_ofst = 0x28,
+ .pr_ofst = 0x98,
+};
+
+static struct stm32_exti_bank stm32h7xx_exti_b3 = {
+ .imr_ofst = 0xA0,
+ .emr_ofst = 0xA4,
+ .rtsr_ofst = 0x40,
+ .ftsr_ofst = 0x44,
+ .swier_ofst = 0x48,
+ .pr_ofst = 0xA8,
+};
+
+static struct stm32_exti_bank *stm32h7xx_exti_banks[] = {
+ &stm32h7xx_exti_b1,
+ &stm32h7xx_exti_b2,
+ &stm32h7xx_exti_b3,
+};
+
static void stm32_irq_handler(struct irq_desc *desc)
{
struct irq_domain *domain = irq_desc_get_handler_data(desc);
@@ -244,3 +277,12 @@ static int __init stm32f4_exti_of_init(struct device_node *np,
}
IRQCHIP_DECLARE(stm32f4_exti, "st,stm32-exti", stm32f4_exti_of_init);
+
+static int __init stm32h7_exti_of_init(struct device_node *np,
+ struct device_node *parent)
+{
+ return stm32_exti_init(stm32h7xx_exti_banks,
+ ARRAY_SIZE(stm32h7xx_exti_banks), np);
+}
+
+IRQCHIP_DECLARE(stm32h7_exti, "st,stm32h7-exti", stm32h7_exti_of_init);
--
2.7.4
next prev parent reply other threads:[~2017-07-07 7:27 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-07 7:26 [PATCH 0/8] " Ludovic Barre
2017-07-07 7:26 ` [PATCH 1/8] irqchip: stm32: select GENERIC_IRQ_CHIP Ludovic Barre
2017-07-07 7:26 ` [PATCH 2/8] irqchip: stm32: add multi-bank management Ludovic Barre
2017-08-07 13:21 ` Marc Zyngier
2017-08-08 9:28 ` Ludovic BARRE
2017-07-07 7:26 ` [PATCH 3/8] dt-bindings: interrupt-controllers: add compatible string for stm32h7 Ludovic Barre
2017-07-07 7:26 ` Ludovic Barre [this message]
2017-07-07 7:26 ` [PATCH 5/8] irqchip: stm32: fix initial values Ludovic Barre
2017-07-07 7:26 ` [PATCH 6/8] irqchip: stm32: move the wakeup on interrupt mask Ludovic Barre
2017-07-07 7:26 ` [PATCH 7/8] ARM: dts: stm32: add exti support for stm32h743 Ludovic Barre
2017-07-07 7:26 ` [PATCH 8/8] ARM: dts: stm32: add support of exti on stm32h743 pinctrl Ludovic Barre
2017-07-07 8:16 ` Alexandre Torgue
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