From: "Christian König" <deathsimple@vodafone.de>
To: helgaas@kernel.org, linux-pci@vger.kernel.org,
dri-devel@lists.freedesktop.org,
platform-driver-x86@vger.kernel.org,
linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org
Subject: [PATCH v8 5/6] drm/amdgpu: move hw generation check into amdgpu_doorbell_init v2
Date: Mon, 10 Jul 2017 16:59:53 +0200 [thread overview]
Message-ID: <1499698794-1718-6-git-send-email-deathsimple@vodafone.de> (raw)
In-Reply-To: <1499698794-1718-1-git-send-email-deathsimple@vodafone.de>
From: Christian König <christian.koenig@amd.com>
This way we can safely call it on SI as well.
v2: fix type in commit message
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 17 ++++++++++++-----
1 file changed, 12 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 4a8fc15..7d1a04a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -419,6 +419,15 @@ void amdgpu_pci_config_reset(struct amdgpu_device *adev)
*/
static int amdgpu_doorbell_init(struct amdgpu_device *adev)
{
+ /* No doorbell on SI hardware generation */
+ if (adev->asic_type < CHIP_BONAIRE) {
+ adev->doorbell.base = 0;
+ adev->doorbell.size = 0;
+ adev->doorbell.num_doorbells = 0;
+ adev->doorbell.ptr = NULL;
+ return 0;
+ }
+
/* doorbell bar mapping */
adev->doorbell.base = pci_resource_start(adev->pdev, 2);
adev->doorbell.size = pci_resource_len(adev->pdev, 2);
@@ -2099,9 +2108,8 @@ int amdgpu_device_init(struct amdgpu_device *adev,
DRM_INFO("register mmio base: 0x%08X\n", (uint32_t)adev->rmmio_base);
DRM_INFO("register mmio size: %u\n", (unsigned)adev->rmmio_size);
- if (adev->asic_type >= CHIP_BONAIRE)
- /* doorbell bar mapping */
- amdgpu_doorbell_init(adev);
+ /* doorbell bar mapping */
+ amdgpu_doorbell_init(adev);
/* io port mapping */
for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
@@ -2307,8 +2315,7 @@ void amdgpu_device_fini(struct amdgpu_device *adev)
adev->rio_mem = NULL;
iounmap(adev->rmmio);
adev->rmmio = NULL;
- if (adev->asic_type >= CHIP_BONAIRE)
- amdgpu_doorbell_fini(adev);
+ amdgpu_doorbell_fini(adev);
amdgpu_debugfs_regs_cleanup(adev);
}
--
2.7.4
next prev parent reply other threads:[~2017-07-10 15:01 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-10 14:59 Resizeable PCI BAR support V8 Christian König
2017-07-10 14:59 ` [PATCH v8 1/6] PCI: add a define for the PCI resource type mask v2 Christian König
2017-07-10 21:47 ` Bjorn Helgaas
2017-07-10 14:59 ` [PATCH v8 2/6] PCI: add resizeable BAR infrastructure v5 Christian König
2017-07-11 12:39 ` kbuild test robot
2017-07-10 14:59 ` [PATCH v8 3/6] PCI: add functionality for resizing resources v7 Christian König
2017-07-10 14:59 ` [PATCH v8 4/6] x86/PCI: Enable a 64bit BAR on AMD Family 15h (Models 30h-3fh) Processors v4 Christian König
2017-07-11 12:07 ` kbuild test robot
2017-07-11 17:50 ` Andy Shevchenko
2017-07-10 14:59 ` Christian König [this message]
2017-07-10 14:59 ` [PATCH v8 6/6] drm/amdgpu: resize VRAM BAR for CPU access v4 Christian König
2017-07-10 22:23 ` Bjorn Helgaas
2017-09-14 8:06 ` Resizeable PCI BAR support V8 Bjorn Helgaas
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