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Mon, 06 Jul 2026 02:33:19 -0700 (PDT) X-Received: by 2002:a05:6214:2503:b0:8e9:f5de:d5fd with SMTP id 6a1803df08f44-8f74caaf417mr106701416d6.10.1783330398707; Mon, 06 Jul 2026 02:33:18 -0700 (PDT) Received: from [192.168.120.193] ([178.235.128.140]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-69a19d9e701sm3807545a12.21.2026.07.06.02.33.14 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 06 Jul 2026 02:33:17 -0700 (PDT) Message-ID: <14c366e5-f030-401e-b51b-62d833f9dde9@oss.qualcomm.com> Date: Mon, 6 Jul 2026 11:33:14 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 3/8] arm64: dts: qcom: kaanapali: add the GPU SMMU node To: Akhil P Oommen , Will Deacon , Robin Murphy , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Marijn Suijten , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter Cc: Sean Paul , linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, dri-devel@lists.freedesktop.org, Qingqing Zhou References: <20260705-kaana-gpu-dt-v2-0-6ac53de56314@oss.qualcomm.com> <20260705-kaana-gpu-dt-v2-3-6ac53de56314@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20260705-kaana-gpu-dt-v2-3-6ac53de56314@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: mdUhBA1F1atS9BGWrYS9PP5ng2gmedWZ X-Authority-Analysis: v=2.4 cv=Hv1G3UTS c=1 sm=1 tr=0 ts=6a4b7660 cx=c_pps a=wEM5vcRIz55oU/E2lInRtA==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=COk6AnOGAAAA:8 a=EUspDBNiAAAA:8 a=54KNg95dvv-uSQ5X8vIA:9 a=QEXdDO2ut3YA:10 a=OIgjcC2v60KrkQgK7BGD:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Spam-Info: AW1haW4tMjYwNzA2MDA5NiBTYWx0ZWRfX19AOZoNfEO44 pvXT9MJRCoyH9EagA4ZdolVpXFkf0qGCkN8TYEUiGHg8Ny3Pfi/mNIu/hwSr1O8AcB3gITEIslX r0+ug5KzGZtrxybgtuZwshhkvxX1f5g= X-Proofpoint-GUID: mdUhBA1F1atS9BGWrYS9PP5ng2gmedWZ X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzA2MDA5NiBTYWx0ZWRfX8OOPTeS+J4Hv WpRod6E8z6fW4EuyrYGiHj5XjEyHSn5CyCtxcMYgfwqC7SRn9vdFLtWBSXBdsiAd2GiNzSstcXN +Qqnfh9OEiSmC7B0eqJ+TOZ7JHqb5MnodevwASpR7cTQdB1RcAO3ik3eZbjTy+4a7e4UAbW517T OUA5q1ajAPq5d3JYlHj+e1TrKARdf3rhYOV0KU7hdn0lTyQfWJqhTQ/2ynBwqfsXxuuDJBQcNP7 8W46r+lNQ6WDG2ns820Z2mcTQhP8LaInbuCX1PIm6iBtetanRNaLX18PJBrOChQgKhQZgh1oWee l9lDxw3vUlSOl6FXuUubmapvjSJ3TmQaTEKqJV8VHYo/PC6/4j5ld080k7JOmDVcJcp4Bhu1n4w hP7hsXBM9zvcqxCjZvjnN6KSzZ7lhJ0OazD7AVZOVS2NIk4wh1XhS7AVw8IoFz/M1En8e4WbC+e UzSjR4cF687t2LBCZ7g== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-07-06_01,2026-07-03_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 suspectscore=0 malwarescore=0 adultscore=0 priorityscore=1501 spamscore=0 bulkscore=0 clxscore=1015 lowpriorityscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607060096 On 7/5/26 10:00 AM, Akhil P Oommen wrote: > From: Qingqing Zhou > > Add the Adreno GPU SMMU node for kaanapali platform. > > Signed-off-by: Qingqing Zhou > Signed-off-by: Akhil P Oommen > --- > arch/arm64/boot/dts/qcom/kaanapali.dtsi | 43 +++++++++++++++++++++++++++++++++ > 1 file changed, 43 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/kaanapali.dtsi b/arch/arm64/boot/dts/qcom/kaanapali.dtsi > index 7aa9653bd456..19eceecc2a19 100644 > --- a/arch/arm64/boot/dts/qcom/kaanapali.dtsi > +++ b/arch/arm64/boot/dts/qcom/kaanapali.dtsi > @@ -2601,6 +2601,49 @@ gpucc: clock-controller@3d90000 { > #power-domain-cells = <1>; > }; > > + adreno_smmu: iommu@3da0000 { > + compatible = "qcom,kaanapali-smmu-500", > + "qcom,adreno-smmu", > + "qcom,smmu-500", > + "arm,mmu-500"; > + reg = <0x0 0x03da0000 0x0 0x40000>; > + #iommu-cells = <2>; > + #global-interrupts = <1>; > + dma-coherent; > + > + power-domains = <&gpucc GPU_CC_CX_GDSC>; > + > + clocks = <&gpucc GPU_CC_GPU_SMMU_VOTE_CLK>; > + clock-names = "hlos"; Let's match the property order of glymur.dtsi for the contents Reviewed-by: Konrad Dybcio Konrad