From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751557AbdGRLSe (ORCPT ); Tue, 18 Jul 2017 07:18:34 -0400 Received: from szxga03-in.huawei.com ([45.249.212.189]:9371 "EHLO szxga03-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751380AbdGRLSc (ORCPT ); Tue, 18 Jul 2017 07:18:32 -0400 From: John Garry To: CC: , , , John Garry Subject: [PATCH] arm64: defconfig: enable SCSI_HISI_SAS_PCI Date: Tue, 18 Jul 2017 19:44:57 +0800 Message-ID: <1500378297-74232-1-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020206.596DEE58.01C6,ss=1,re=0.000,recu=0.000,reip=0.000,cl=1,cld=1,fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 77a90ff0f8734acc0c76f3c051708093 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Enable HiSilicon SAS controller based on PCI device, which is included in hip08 SoC. Signed-off-by: John Garry diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 6c7d147..542838c 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -164,6 +164,7 @@ CONFIG_EEPROM_AT25=m CONFIG_BLK_DEV_SD=y CONFIG_SCSI_SAS_ATA=y CONFIG_SCSI_HISI_SAS=y +CONFIG_SCSI_HISI_SAS_PCI=y CONFIG_ATA=y CONFIG_SATA_AHCI=y CONFIG_SATA_AHCI_PLATFORM=y -- 1.9.1