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From: Simon Xue <xxm@rock-chips.com>
To: Joerg Roedel <joro@8bytes.org>, Heiko Stuebner <heiko@sntech.de>
Cc: Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	linux-rockchip@lists.infradead.org,
	iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, Simon Xue <xxm@rock-chips.com>
Subject: [PATCH V3 3/4] ARM64: dts: rockchip: rk3368 add iommu nodes
Date: Mon, 24 Jul 2017 10:32:09 +0800	[thread overview]
Message-ID: <1500863530-32792-3-git-send-email-xxm@rock-chips.com> (raw)
In-Reply-To: <1500863530-32792-1-git-send-email-xxm@rock-chips.com>

Add IEP/ISP/VOP/HEVC/VPU iommu nodes

Signed-off-by: Simon Xue <xxm@rock-chips.com>
---
changes since V2:
use rockchip,disable-mmu-reset instead of rk-iommu,disable-reset-quirk

 arch/arm64/boot/dts/rockchip/rk3368.dtsi | 49 ++++++++++++++++++++++++++++++++
 1 file changed, 49 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index 6d5dc05..7b7f9c7 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -724,6 +724,55 @@
 		status = "disabled";
 	};
 
+	iep_mmu: iommu@ff900800 {
+		compatible = "rockchip,iommu";
+		reg = <0x0 0xff900800 0x0 0x100>;
+		interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH 0>;
+		interrupt-names = "iep_mmu";
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
+	isp_mmu: iommu@ff914000 {
+		compatible = "rockchip,iommu";
+		reg = <0x0 0xff914000 0x0 0x100>,
+		      <0x0 0xff915000 0x0 0x100>;
+		interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "isp_mmu";
+		#iommu-cells = <0>;
+		rockchip,disable-mmu-reset;
+		status = "disabled";
+	};
+
+	vop_mmu: iommu@ff930300 {
+		compatible = "rockchip,iommu";
+		reg = <0x0 0xff930300 0x0 0x100>;
+		interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "vop_mmu";
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
+	hevc_mmu: iommu@ff9a0440 {
+		compatible = "rockchip,iommu";
+		reg = <0x0 0xff9a0440 0x0 0x40>,
+		      <0x0 0xff9a0480 0x0 0x40>;
+		interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "hevc_mmu";
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
+	vpu_mmu: iommu@ff9a0800 {
+		compatible = "rockchip,iommu";
+		reg = <0x0 0xff9a0800 0x0 0x100>;
+		interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "vepu_mmu", "vdpu_mmu";
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
 	gic: interrupt-controller@ffb71000 {
 		compatible = "arm,gic-400";
 		interrupt-controller;
-- 
1.9.1

  parent reply	other threads:[~2017-07-24  2:33 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-07-24  2:32 [PATCH V3 1/4] ARM64: dts: rockchip: rk3328 " Simon Xue
2017-07-24  2:32 ` [PATCH V3 2/4] ARM: dts: rockchip: rk322x " Simon Xue
2017-08-21 21:17   ` Heiko Stuebner
2017-07-24  2:32 ` Simon Xue [this message]
2017-08-21 21:08   ` [PATCH V3 3/4] ARM64: dts: rockchip: rk3368 " Heiko Stuebner
2017-07-24  2:32 ` [PATCH V3 4/4] ARM64: dts: rockchip: rk3399 " Simon Xue
2017-08-21 21:14   ` Heiko Stuebner
2017-07-26 10:58 ` [PATCH V3 1/4] ARM64: dts: rockchip: rk3328 " Joerg Roedel
2017-07-26 11:44   ` Heiko Stübner
2017-07-26 12:27     ` Joerg Roedel
2017-07-26 13:53       ` Heiko Stübner
2017-07-27 12:15         ` Joerg Roedel
2017-07-27 12:26           ` Heiko Stübner
2017-07-27 12:45             ` Joerg Roedel
2017-08-21 21:08 ` Heiko Stuebner

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