From: Matt Redfearn <matt.redfearn@imgtec.com>
To: Ralf Baechle <ralf@linux-mips.org>
Cc: <linux-mips@linux-mips.org>,
Matt Redfearn <matt.redfearn@imgtec.com>,
Marcin Nowakowski <marcin.nowakowski@imgtec.com>,
Miodrag Dinic <miodrag.dinic@imgtec.com>,
<linux-kernel@vger.kernel.org>,
James Hogan <james.hogan@imgtec.com>,
Paul Burton <paul.burton@imgtec.com>,
Ingo Molnar <mingo@kernel.org>,
David Daney <david.daney@cavium.com>
Subject: [PATCH v3 4/6] MIPS: microMIPS: Fix decoding of swsp16 instruction
Date: Tue, 8 Aug 2017 13:22:33 +0100 [thread overview]
Message-ID: <1502194955-18018-5-git-send-email-matt.redfearn@imgtec.com> (raw)
In-Reply-To: <1502194955-18018-1-git-send-email-matt.redfearn@imgtec.com>
When the immediate encoded in the instruction is accessed, it is sign
extended due to being a signed value being assigned to a signed integer.
The ISA specifies that this operation is an unsigned operation.
The sign extension leads us to incorrectly decode:
801e9c8e: cbf1 sw ra,68(sp)
As having an immediate of 1073741809.
Since the instruction format does not specify signed/unsigned, and this
is currently the only location to use this instuction format, change it
to an unsigned immediate.
Fixes: bb9bc4689b9c ("MIPS: Calculate microMIPS ra properly when unwinding the stack")
Suggested-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Matt Redfearn <matt.redfearn@imgtec.com>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
---
Changes in v3: None
Changes in v2: None
arch/mips/include/uapi/asm/inst.h | 2 +-
arch/mips/kernel/process.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/mips/include/uapi/asm/inst.h b/arch/mips/include/uapi/asm/inst.h
index d61897535926..6abea5183d7c 100644
--- a/arch/mips/include/uapi/asm/inst.h
+++ b/arch/mips/include/uapi/asm/inst.h
@@ -981,7 +981,7 @@ struct mm16_r3_format { /* Load from global pointer format */
struct mm16_r5_format { /* Load/store from stack pointer format */
__BITFIELD_FIELD(unsigned int opcode : 6,
__BITFIELD_FIELD(unsigned int rt : 5,
- __BITFIELD_FIELD(signed int simmediate : 5,
+ __BITFIELD_FIELD(unsigned int imm : 5,
__BITFIELD_FIELD(unsigned int : 16, /* Ignored */
;))))
};
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index 288a79bd0e72..6fa726b0be01 100644
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -214,7 +214,7 @@ static inline int is_ra_save_ins(union mips_instruction *ip, int *poff)
if (ip->mm16_r5_format.rt != 31)
return 0;
- *poff = ip->mm16_r5_format.simmediate;
+ *poff = ip->mm16_r5_format.imm;
*poff = (*poff << 2) / sizeof(ulong);
return 1;
--
2.7.4
next prev parent reply other threads:[~2017-08-08 12:23 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-08 12:22 [PATCH v3 0/6] MIPS: Further microMIPS stack unwinding fixes Matt Redfearn
2017-08-08 12:22 ` [PATCH v3 1/6] MIPS: Handle non word sized instructions when examining frame Matt Redfearn
2017-08-08 12:22 ` [PATCH v3 2/6] MIPS: microMIPS: Fix detection of addiusp instruction Matt Redfearn
2017-08-08 12:22 ` [PATCH v3 3/6] MIPS: microMIPS: Fix decoding " Matt Redfearn
2017-08-08 12:22 ` Matt Redfearn [this message]
2017-08-08 12:22 ` [PATCH v3 5/6] MIPS: Stacktrace: Fix microMIPS stack unwinding on big endian systems Matt Redfearn
2017-08-08 12:22 ` [PATCH v3 6/6] MIPS: Refactor handling of stack pointer in get_frame_info Matt Redfearn
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