From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752484AbdHQJep (ORCPT ); Thu, 17 Aug 2017 05:34:45 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:30640 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752115AbdHQJeF (ORCPT ); Thu, 17 Aug 2017 05:34:05 -0400 From: Amelie Delaunay To: Greg Kroah-Hartman , Rob Herring , Mark Rutland , Russell King , Maxime Coquelin , Alexandre Torgue , John Youn CC: , , , , Benjamin Gaignard Subject: [PATCH 3/7] ARM: dts: stm32: Add USB HS support for STM32F746 MCU Date: Thu, 17 Aug 2017 11:33:02 +0200 Message-ID: <1502962386-6683-4-git-send-email-amelie.delaunay@st.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1502962386-6683-1-git-send-email-amelie.delaunay@st.com> References: <1502962386-6683-1-git-send-email-amelie.delaunay@st.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.201.20.5] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2017-08-17_04:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch adds the USB pins and nodes for USB HS core on STM32F746 SoC. Signed-off-by: Amelie Delaunay --- arch/arm/boot/dts/stm32f746.dtsi | 49 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+) diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi index 5633860..fcfe5a6 100644 --- a/arch/arm/boot/dts/stm32f746.dtsi +++ b/arch/arm/boot/dts/stm32f746.dtsi @@ -379,6 +379,46 @@ bias-disable; }; }; + + usbotg_hs_pins_a: usbotg_hs@0 { + pins { + pinmux = , + , + , + , + , + , + , + , + , + , + , + ; + bias-disable; + drive-push-pull; + slew-rate = <2>; + }; + }; + + usbotg_hs_pins_b: usbotg_hs@1 { + pins { + pinmux = , + , + , + , + , + , + , + , + , + , + , + ; + bias-disable; + drive-push-pull; + slew-rate = <2>; + }; + }; }; crc: crc@40023000 { @@ -431,6 +471,15 @@ st,mem2mem; status = "disabled"; }; + + usbotg_hs: usb@40040000 { + compatible = "st,stm32f7xx-hsotg"; + reg = <0x40040000 0x40000>; + interrupts = <77>; + clocks = <&rcc 0 STM32F7_AHB1_CLOCK(OTGHS)>; + clock-names = "otg"; + status = "disabled"; + }; }; }; -- 2.7.4