From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752079AbdH2Jft (ORCPT ); Tue, 29 Aug 2017 05:35:49 -0400 Received: from mail-wm0-f44.google.com ([74.125.82.44]:37095 "EHLO mail-wm0-f44.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751250AbdH2Jfr (ORCPT ); Tue, 29 Aug 2017 05:35:47 -0400 From: Daniel Lezcano To: tglx@linutronix.de Cc: linux-kernel@vger.kernel.org, Dong Aisheng , Mark Rutland , devicetree@vger.kernel.org, Shawn Guo , Bai Ping , Rob Herring , Rob Herring Subject: [PATCH 1/9] dt-bindings: timer: Add nxp tpm timer binding doc Date: Tue, 29 Aug 2017 11:34:19 +0200 Message-Id: <1503999271-15712-1-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <20170829093354.GA2572@mai> References: <20170829093354.GA2572@mai> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Dong Aisheng Adding NXP Low Power Timer/Pulse Width Modulation Module (TPM) binding doc. Cc: Mark Rutland Cc: devicetree@vger.kernel.org Cc: Daniel Lezcano Cc: Thomas Gleixner Cc: Shawn Guo Cc: Bai Ping Acked-by: Rob Herring Signed-off-by: Dong Aisheng Signed-off-by: Daniel Lezcano --- .../devicetree/bindings/timer/nxp,tpm-timer.txt | 28 ++++++++++++++++++++++ 1 file changed, 28 insertions(+) create mode 100644 Documentation/devicetree/bindings/timer/nxp,tpm-timer.txt diff --git a/Documentation/devicetree/bindings/timer/nxp,tpm-timer.txt b/Documentation/devicetree/bindings/timer/nxp,tpm-timer.txt new file mode 100644 index 0000000..b4aa7dd --- /dev/null +++ b/Documentation/devicetree/bindings/timer/nxp,tpm-timer.txt @@ -0,0 +1,28 @@ +NXP Low Power Timer/Pulse Width Modulation Module (TPM) + +The Timer/PWM Module (TPM) supports input capture, output compare, +and the generation of PWM signals to control electric motor and power +management applications. The counter, compare and capture registers +are clocked by an asynchronous clock that can remain enabled in low +power modes. TPM can support global counter bus where one TPM drives +the counter bus for the others, provided bit width is the same. + +Required properties: + +- compatible : should be "fsl,imx7ulp-tpm" +- reg : Specifies base physical address and size of the register sets + for the clock event device and clock source device. +- interrupts : Should be the clock event device interrupt. +- clocks : The clocks provided by the SoC to drive the timer, must contain + an entry for each entry in clock-names. +- clock-names : Must include the following entries: "igp" and "per". + +Example: +tpm5: tpm@40260000 { + compatible = "fsl,imx7ulp-tpm"; + reg = <0x40260000 0x1000>; + interrupts = ; + clocks = <&clks IMX7ULP_CLK_NIC1_BUS_DIV>, + <&clks IMX7ULP_CLK_LPTPM5>; + clock-names = "ipg", "per"; +}; -- 2.7.4