From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751366AbdH2Stj (ORCPT ); Tue, 29 Aug 2017 14:49:39 -0400 Received: from mail-wr0-f194.google.com ([209.85.128.194]:36474 "EHLO mail-wr0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751186AbdH2Sth (ORCPT ); Tue, 29 Aug 2017 14:49:37 -0400 From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: opendmb@gmail.com, bcm-kernel-feedback-list@broadcom.com, Florian Fainelli , Kevin Cernekee , Thomas Gleixner , Jason Cooper , Marc Zyngier , linux-mips@linux-mips.org (open list:BROADCOM BMIPS MIPS ARCHITECTURE) Subject: [PATCH] irqchip: irq-bcm7120-l2: Use correct I/O accessors for irq_fwd_mask Date: Tue, 29 Aug 2017 11:43:06 -0700 Message-Id: <1504032187-53035-1-git-send-email-f.fainelli@gmail.com> X-Mailer: git-send-email 1.9.1 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Initialization of irq_fwd_mask was done using __raw_readl() which happens to work for all cases except when using ARM BE8 which requires readl() (with the proper swapping). Move the initialization of the irq_fwd_mask till later when we have correctly defined our I/O accessors. Signed-off-by: Florian Fainelli --- drivers/irqchip/irq-bcm7120-l2.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/drivers/irqchip/irq-bcm7120-l2.c b/drivers/irqchip/irq-bcm7120-l2.c index 64c2692070ef..983640eba418 100644 --- a/drivers/irqchip/irq-bcm7120-l2.c +++ b/drivers/irqchip/irq-bcm7120-l2.c @@ -250,12 +250,6 @@ static int __init bcm7120_l2_intc_probe(struct device_node *dn, if (ret < 0) goto out_free_l1_data; - for (idx = 0; idx < data->n_words; idx++) { - __raw_writel(data->irq_fwd_mask[idx], - data->pair_base[idx] + - data->en_offset[idx]); - } - for (irq = 0; irq < data->num_parent_irqs; irq++) { ret = bcm7120_l2_intc_init_one(dn, data, irq, valid_mask); if (ret) @@ -297,6 +291,10 @@ static int __init bcm7120_l2_intc_probe(struct device_node *dn, gc->reg_base = data->pair_base[idx]; ct->regs.mask = data->en_offset[idx]; + /* gc->reg_base is defined and so is gc->writel */ + irq_reg_writel(gc, data->irq_fwd_mask[idx], + data->en_offset[idx]); + ct->chip.irq_mask = irq_gc_mask_clr_bit; ct->chip.irq_unmask = irq_gc_mask_set_bit; ct->chip.irq_ack = irq_gc_noop; -- 1.9.1