From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752086AbdIMI62 (ORCPT ); Wed, 13 Sep 2017 04:58:28 -0400 Received: from conuserg-09.nifty.com ([210.131.2.76]:64446 "EHLO conuserg-09.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751545AbdIMI60 (ORCPT ); Wed, 13 Sep 2017 04:58:26 -0400 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-09.nifty.com v8D8ugqk027391 X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: Marc Zyngier , linux-gpio@vger.kernel.org Cc: Thomas Gleixner , Jason Cooper , Rob Herring , Linus Walleij , David Daney , Masami Hiramatsu , Jassi Brar , Masahiro Yamada , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , Mark Rutland , linux-arm-kernel@lists.infradead.org Subject: [PATCH v5 2/3] dt-bindings: gpio: uniphier: add UniPhier GPIO binding Date: Wed, 13 Sep 2017 17:56:29 +0900 Message-Id: <1505292990-22957-3-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1505292990-22957-1-git-send-email-yamada.masahiro@socionext.com> References: <1505292990-22957-1-git-send-email-yamada.masahiro@socionext.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This GPIO controller is used on UniPhier SoC family. Signed-off-by: Masahiro Yamada Acked-by: Rob Herring --- .../devicetree/bindings/gpio/gpio-uniphier.txt | 43 ++++++++++++++++++++++ 1 file changed, 43 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/gpio-uniphier.txt diff --git a/Documentation/devicetree/bindings/gpio/gpio-uniphier.txt b/Documentation/devicetree/bindings/gpio/gpio-uniphier.txt new file mode 100644 index 0000000..0a371bdd --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/gpio-uniphier.txt @@ -0,0 +1,43 @@ +UniPhier GPIO controller + +Required properties: +- compatible: Should be "socionext,uniphier-gpio". +- reg: Specifies offset and length of the register set for the device. +- gpio-controller: Marks the device node as a GPIO controller. +- #gpio-cells: Should be 2. The first cell is the pin number and the second + cell is used to specify optional parameters. +- interrupt-parent: Specifies the parent interrupt controller. +- interrupts: Specifies interrupts connected to the parent interrupt controller. +- interrupt-controller: Marks the device node as an interrupt controller. +- #interrupt-cells: Should be 2. The first cell defines the interrupt number. + The second cell bits[3:0] is used to specify trigger type as follows: + 1 = low-to-high edge triggered + 2 = high-to-low edge triggered + 4 = active high level-sensitive + 8 = active low level-sensitive + Valid combinations are 1, 2, 3, 4, 8. +- ngpios: Specifies the number of GPIO lines. +- gpio-ranges: Mapping to pin controller pins (as described in gpio.txt) + +Optional properties: +- gpio-ranges-group-names: Used for named gpio ranges (as described in gpio.txt) + +Example: + gpio: gpio@55000000 { + compatible = "socionext,uniphier-gpio"; + reg = <0x55000000 0x200>; + interrupt-parent = <&aidet>; + interrupts = <48 0>, <49 0>, <50 0>, <51 0>, + <52 0>, <53 0>, <54 0>, <55 0>, + <56 0>, <57 0>, <58 0>, <59 0>, + <60 0>, <61 0>, <62 0>, <63 0>, + <154 0>, <155 0>, <156 0>, <157 0>, + <158 0>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 0 0>; + gpio-ranges-group-names = "gpio_range"; + ngpios = <248>; + }; -- 2.7.4