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Subject: Re: [PATCH v2 3/5] clk: aspeed: Add platform driver and register
 PLLs
From: Andrew Jeffery <andrew@aj.id.au>
To: Joel Stanley <joel@jms.id.au>
Cc: Lee Jones <lee.jones@linaro.org>,
        Michael Turquette <mturquette@baylibre.com>,
        Stephen Boyd <sboyd@codeaurora.org>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
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        Benjamin Herrenschmidt <benh@kernel.crashing.org>,
        Jeremy Kerr <jk@ozlabs.org>, Rick Altherr <raltherr@google.com>,
        Ryan Chen <ryan_chen@aspeedtech.com>, Arnd Bergmann <arnd@arndb.de>
Date: Wed, 27 Sep 2017 17:04:05 +0930
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On Wed, 2017-09-27 at 16:13 +1000, Joel Stanley wrote:
> > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 div_table,
> >=20
> > This doesn't seem to be correct. There's the problem of 0b000 and 0b001=
 mapping
> > the same value of 2 for the AST2500, whose table then increments in ste=
ps of 1.
> > The AST2400 mapping on the otherhand is multiples of 2 starting at 2, w=
ith no
> > inconsistency for 0b000 vs 0b001.
>=20
> Yep, we do use a different table for ast2400 vs ast2500. See
> ast2400_div_table vs ast2500_div_table.

Yep, but for the AST2500 this is a different table again to what you've
already defined (for the AST2500). However, for the AST2400 the table
looks the same as the other AST2400 tables.

Cheers,

Andrew
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