From: Andrew Jeffery <andrew@aj.id.au>
To: Joel Stanley <joel@jms.id.au>, Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>
Cc: "Russell King" <linux@armlinux.org.uk>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
"Rick Altherr" <raltherr@google.com>,
"Brendan Higgins" <brendanhiggins@google.com>,
"Cédric Le Goater" <clg@kaod.org>,
linux-aspeed@lists.ozlabs.org
Subject: Re: [PATCH v2 8/9] ARM: dts: aspeed: Correctly order UART nodes
Date: Thu, 05 Oct 2017 10:07:17 +1030 [thread overview]
Message-ID: <1507160237.5452.36.camel@aj.id.au> (raw)
In-Reply-To: <20171004064917.2498-9-joel@jms.id.au>
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On Wed, 2017-10-04 at 17:19 +1030, Joel Stanley wrote:
> Order them all by address.
>
> Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
> ---
> arch/arm/boot/dts/aspeed-g4.dtsi | 48 +++++++++++++++---------------
> -
> arch/arm/boot/dts/aspeed-g5.dtsi | 61 ++++++++++++++++++++--------
> ------------
> 2 files changed, 54 insertions(+), 55 deletions(-)
>
> diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi
> b/arch/arm/boot/dts/aspeed-g4.dtsi
> index a549413bda3f..4125e07f22f9 100644
> --- a/arch/arm/boot/dts/aspeed-g4.dtsi
> +++ b/arch/arm/boot/dts/aspeed-g4.dtsi
> @@ -183,6 +183,27 @@
> clock-names = "PCLK";
> };
>
> + uart1: serial@1e783000 {
> + compatible = "ns16550a";
> + reg = <0x1e783000 0x1000>;
> + reg-shift = <2>;
> + interrupts = <9>;
> + clocks = <&clk_uart>;
> + no-loopback-test;
> + status = "disabled";
> + };
> +
> + uart5: serial@1e784000 {
> + compatible = "ns16550a";
> + reg = <0x1e784000 0x1000>;
> + reg-shift = <2>;
> + interrupts = <10>;
> + clocks = <&clk_uart>;
> + current-speed = <38400>;
> + no-loopback-test;
> + status = "disabled";
> + };
> +
> wdt1: wdt@1e785000 {
> compatible = "aspeed,ast2400-wdt";
> reg = <0x1e785000 0x1c>;
> @@ -197,11 +218,11 @@
> status = "disabled";
> };
>
> - uart1: serial@1e783000 {
> + uart6: serial@1e787000 {
> compatible = "ns16550a";
> - reg = <0x1e783000 0x1000>;
> + reg = <0x1e787000 0x1000>;
> reg-shift = <2>;
> - interrupts = <9>;
> + interrupts = <10>;
> clocks = <&clk_uart>;
> no-loopback-test;
> status = "disabled";
> @@ -237,27 +258,6 @@
> status = "disabled";
> };
>
> - uart5: serial@1e784000 {
> - compatible = "ns16550a";
> - reg = <0x1e784000 0x1000>;
> - reg-shift = <2>;
> - interrupts = <10>;
> - clocks = <&clk_uart>;
> - current-speed = <38400>;
> - no-loopback-test;
> - status = "disabled";
> - };
> -
> - uart6: serial@1e787000 {
> - compatible = "ns16550a";
> - reg = <0x1e787000 0x1000>;
> - reg-shift = <2>;
> - interrupts = <10>;
> - clocks = <&clk_uart>;
> - no-loopback-test;
> - status = "disabled";
> - };
> -
> i2c: i2c@1e78a000 {
> compatible = "simple-bus";
> #address-cells = <1>;
> diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi
> b/arch/arm/boot/dts/aspeed-g5.dtsi
> index de2dafa71651..61cc2d25143a 100644
> --- a/arch/arm/boot/dts/aspeed-g5.dtsi
> +++ b/arch/arm/boot/dts/aspeed-g5.dtsi
> @@ -227,6 +227,26 @@
> clock-names = "PCLK";
> };
>
> + uart1: serial@1e783000 {
> + compatible = "ns16550a";
> + reg = <0x1e783000 0x1000>;
> + reg-shift = <2>;
> + interrupts = <9>;
> + clocks = <&clk_uart>;
> + no-loopback-test;
> + status = "disabled";
> + };
> +
> + uart5: serial@1e784000 {
> + compatible = "ns16550a";
> + reg = <0x1e784000 0x1000>;
> + reg-shift = <2>;
> + interrupts = <10>;
> + clocks = <&clk_uart>;
> + current-speed = <38400>;
> + no-loopback-test;
> + status = "disabled";
> + };
>
> wdt1: wdt@1e785000 {
> compatible = "aspeed,ast2500-wdt";
> @@ -247,16 +267,6 @@
> status = "disabled";
> };
>
> - uart1: serial@1e783000 {
> - compatible = "ns16550a";
> - reg = <0x1e783000 0x1000>;
> - reg-shift = <2>;
> - interrupts = <9>;
> - clocks = <&clk_uart>;
> - no-loopback-test;
> - status = "disabled";
> - };
> -
> lpc: lpc@1e789000 {
> compatible = "aspeed,ast2500-lpc",
> "simple-mfd";
> reg = <0x1e789000 0x1000>;
> @@ -287,6 +297,16 @@
> };
> };
>
> + uart6: serial@1e787000 {
> + compatible = "ns16550a";
> + reg = <0x1e787000 0x1000>;
> + reg-shift = <2>;
> + interrupts = <10>;
> + clocks = <&clk_uart>;
> + no-loopback-test;
> + status = "disabled";
> + };
> +
> uart2: serial@1e78d000 {
> compatible = "ns16550a";
> reg = <0x1e78d000 0x1000>;
> @@ -317,27 +337,6 @@
> status = "disabled";
> };
>
> - uart5: serial@1e784000 {
> - compatible = "ns16550a";
> - reg = <0x1e784000 0x1000>;
> - reg-shift = <2>;
> - interrupts = <10>;
> - clocks = <&clk_uart>;
> - current-speed = <38400>;
> - no-loopback-test;
> - status = "disabled";
> - };
> -
> - uart6: serial@1e787000 {
> - compatible = "ns16550a";
> - reg = <0x1e787000 0x1000>;
> - reg-shift = <2>;
> - interrupts = <10>;
> - clocks = <&clk_uart>;
> - no-loopback-test;
> - status = "disabled";
> - };
> -
> i2c: i2c@1e78a000 {
> compatible = "simple-bus";
> #address-cells = <1>;
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next prev parent reply other threads:[~2017-10-04 23:37 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-04 6:49 [PATCH v2 0/9] ARM: dts: aspeed: Device tree updates Joel Stanley
2017-10-04 6:49 ` [PATCH v2 1/9] ARM: dts: aspeed: Move pinctrl subnodes to improve readability Joel Stanley
2017-10-04 6:49 ` [PATCH v2 2/9] ARM: dts: aspeed: Reorder ADC node Joel Stanley
2017-10-04 23:31 ` Andrew Jeffery
2017-10-04 6:49 ` [PATCH v2 3/9] ARM: dts: aspeed: Add I2C buses Joel Stanley
2017-10-04 6:49 ` [PATCH v2 4/9] ARM: dts: aspeed-romulus: Add I2C devices Joel Stanley
2017-10-04 23:35 ` Andrew Jeffery
2017-10-04 6:49 ` [PATCH v2 5/9] ARM: dts: aspeed-palmetto: " Joel Stanley
2017-10-04 6:49 ` [PATCH v2 6/9] ARM: dts: aspeed-ast2500: " Joel Stanley
2017-10-04 6:49 ` [PATCH v2 7/9] ARM: dts: aspeed: Add aliases for UARTs Joel Stanley
2017-10-04 6:49 ` [PATCH v2 8/9] ARM: dts: aspeed: Correctly order UART nodes Joel Stanley
2017-10-04 23:37 ` Andrew Jeffery [this message]
2017-10-04 6:49 ` [PATCH v2 9/9] ARM: dts: aspeed: Clean up " Joel Stanley
2017-10-04 6:52 ` Joel Stanley
2017-10-04 23:39 ` Andrew Jeffery
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