From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751931AbdJTMt6 (ORCPT ); Fri, 20 Oct 2017 08:49:58 -0400 Received: from mail-pf0-f195.google.com ([209.85.192.195]:46105 "EHLO mail-pf0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751480AbdJTMtz (ORCPT ); Fri, 20 Oct 2017 08:49:55 -0400 X-Google-Smtp-Source: ABhQp+SS3lLoSxjHKAJtSwcO6vopvDHP8cdFQlL8qdYN3jlj6Qy9w2djOe5ldDHaOtaWhqYGKUaKjg== From: memeka To: robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk, kgene@kernel.org, krzk@kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Marian Mihailescu , Willy Wolff Subject: [PATCH] ARM: dts: exynos: add cpu perf counters to Exynos54xx boards Date: Fri, 20 Oct 2017 23:19:34 +1030 Message-Id: <1508503774-2328-1-git-send-email-mihailescu2m@gmail.com> X-Mailer: git-send-email 2.7.4 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Marian Mihailescu Enable support for ARM Performance Monitoring Units available in Cortex-A7 and Cortex-A15 CPU cores for Exynos54xx SoCs (5410, 5420 and 5422/5800). Exynos5410 currently has only Cortex-A7 nodes defined in the device tree, so the Cortex-A15 PMU is defined in the exynos5420 device tree file. Tested with perf on Odroid XU4 (Exynos5422): armv7_cortex_a7 PMU driver: 5 counters available armv7_cortex_a15 PMU driver: 7 counters available Suggested-by: Marek Szyprowski Signed-off-by: Marian Mihailescu Signed-off-by: Willy Wolff --- arch/arm/boot/dts/exynos5420.dtsi | 13 +++++++++++++ arch/arm/boot/dts/exynos54xx.dtsi | 13 +++++++++++++ 2 files changed, 26 insertions(+) diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 02d2f89..468059e 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -695,6 +695,19 @@ iommus = <&sysmmu_jpeg1>; }; + arm-a15-pmu { + compatible = "arm,cortex-a15-pmu"; + interrupt-parent = <&combiner>; + interrupts = <1 2>, + <7 0>, + <16 6>, + <19 2>; + interrupt-affinity = <&cpu4>, + <&cpu5>, + <&cpu6>, + <&cpu7>; + }; + pmu_system_controller: system-controller@10040000 { compatible = "samsung,exynos5420-pmu", "syscon"; reg = <0x10040000 0x5000>; diff --git a/arch/arm/boot/dts/exynos54xx.dtsi b/arch/arm/boot/dts/exynos54xx.dtsi index 8ca4fef..8e007a4 100644 --- a/arch/arm/boot/dts/exynos54xx.dtsi +++ b/arch/arm/boot/dts/exynos54xx.dtsi @@ -79,6 +79,19 @@ interrupts = ; }; + arm-a7-pmu { + compatible = "arm,cortex-a7-pmu"; + interrupt-parent = <&gic>; + interrupts = , + , + , + ; + interrupt-affinity = <&cpu0>, + <&cpu1>, + <&cpu2>, + <&cpu3>; + }; + sss: sss@10830000 { compatible = "samsung,exynos4210-secss"; reg = <0x10830000 0x300>; -- 2.7.4