From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932462AbdJZQNo (ORCPT ); Thu, 26 Oct 2017 12:13:44 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:19520 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932255AbdJZQNl (ORCPT ); Thu, 26 Oct 2017 12:13:41 -0400 From: Philippe Cornu To: Rob Herring , Arnd Bergmann , "Russell King" , Mark Rutland , "Archit Taneja" , Andrzej Hajda , "Laurent Pinchart" , David Airlie , Philippe Cornu , Philipp Zabel , Benjamin Gaignard , Bhumika Goyal , , , , CC: Yannick Fertre , Vincent Abriou , Alexandre Torgue , "Maxime Coquelin" , Gabriel Fernandez , Ludovic Barre , "Fabien Dessenne" , Mickael Reulier Subject: [PATCH] dt-bindings: display: stm32: add pixel clock mandatory property Date: Thu, 26 Oct 2017 18:12:36 +0200 Message-ID: <1509034356-23885-1-git-send-email-philippe.cornu@st.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.201.23.32] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2017-10-26_05:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the DPI/RGB input pixel clock in mandatory properties because it really offers a better preciseness for timing computations. Note: Fix also the DSI panel example where "ref" & "pclk" clocks were swapped. Signed-off-by: Philippe Cornu --- Documentation/devicetree/bindings/display/st,stm32-ltdc.txt | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt b/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt index 0292522..99823fb 100644 --- a/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt +++ b/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt @@ -28,6 +28,7 @@ Mandatory properties specific to STM32 DSI: - #size-cells: Should be <0>. - compatible: "st,stm32-dsi". - clock-names: + - DPI/RGB input pixel clock string name, must be "px_clk". - phy pll reference clock string name, must be "ref". - resets: see [5]. - reset-names: see [5]. @@ -97,8 +98,9 @@ Example 2: DSI panel #size-cells = <0>; compatible = "st,stm32-dsi"; reg = <0x40016c00 0x800>; - clocks = <&rcc 1 CLK_F469_DSI>, <&clk_hse>; - clock-names = "ref", "pclk"; + clocks = <&rcc 1 CLK_F469_DSI>, <&rcc 1 CLK_LCD>, + <&clk_hse>; + clock-names = "pclk", "px_clk", "ref"; resets = <&rcc STM32F4_APB2_RESET(DSI)>; reset-names = "apb"; -- 1.9.1