From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932399AbdJ2VZC (ORCPT ); Sun, 29 Oct 2017 17:25:02 -0400 Received: from mail-wr0-f196.google.com ([209.85.128.196]:54614 "EHLO mail-wr0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932342AbdJ2VZA (ORCPT ); Sun, 29 Oct 2017 17:25:00 -0400 X-Google-Smtp-Source: ABhQp+TSrVVDP8FbF0g6TCdRCXvUYpuhclfh8W/oUjd4pR1W14f1srpzGtg6eL28maMz+FPVwLPVHQ== From: Daniel Lezcano To: tglx@linutronix.de, daniel.lezcano@linaro.org Cc: linux-kernel@vger.kernel.org, Matt Redfearn Subject: [PATCH 16/17] clocksource/drivers/mips-gic-timer: Add fastpath for local timer updates Date: Sun, 29 Oct 2017 22:20:33 +0100 Message-Id: <1509312035-17368-16-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1509312035-17368-1-git-send-email-daniel.lezcano@linaro.org> References: <1509312035-17368-1-git-send-email-daniel.lezcano@linaro.org> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Matt Redfearn Always accessing the compare register via the CM redirect region is (relatively) slow. If the timer being updated is the current CPUs then this can be shortcutted by writing to the CM VP local region. Signed-off-by: Matt Redfearn Signed-off-by: Daniel Lezcano --- drivers/clocksource/mips-gic-timer.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/clocksource/mips-gic-timer.c b/drivers/clocksource/mips-gic-timer.c index 775dea0..a04808a 100644 --- a/drivers/clocksource/mips-gic-timer.c +++ b/drivers/clocksource/mips-gic-timer.c @@ -39,13 +39,18 @@ static u64 notrace gic_read_count(void) static int gic_next_event(unsigned long delta, struct clock_event_device *evt) { + int cpu = cpumask_first(evt->cpumask); u64 cnt; int res; cnt = gic_read_count(); cnt += (u64)delta; - write_gic_vl_other(mips_cm_vp_id(cpumask_first(evt->cpumask))); - write_gic_vo_compare(cnt); + if (cpu == raw_smp_processor_id()) { + write_gic_vl_compare(cnt); + } else { + write_gic_vl_other(mips_cm_vp_id(cpu)); + write_gic_vo_compare(cnt); + } res = ((int)(gic_read_count() - cnt) >= 0) ? -ETIME : 0; return res; } -- 2.7.4