From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932651AbdJaLuU (ORCPT ); Tue, 31 Oct 2017 07:50:20 -0400 Received: from mga02.intel.com ([134.134.136.20]:30523 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932289AbdJaLtX (ORCPT ); Tue, 31 Oct 2017 07:49:23 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.44,323,1505804400"; d="scan'208";a="915804341" From: Luwei Kang To: kvm@vger.kernel.org Cc: pbonzini@redhat.com, rkrcmar@redhat.com, tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, x86@kernel.org, linux-kernel@vger.kernel.org, Chao Peng , Luwei Kang Subject: [patch v2 5/8] KVM: x86: add Intel processor trace context for each vcpu Date: Tue, 31 Oct 2017 06:05:14 +0800 Message-Id: <1509401117-15521-6-git-send-email-luwei.kang@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1509401117-15521-1-git-send-email-luwei.kang@intel.com> References: <1509401117-15521-1-git-send-email-luwei.kang@intel.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Chao Peng Add a date structure to save Intel processor trace context. It mainly include all the MSR of Intel processor trace. Signed-off-by: Chao Peng Signed-off-by: Luwei Kang --- arch/x86/include/asm/msr-index.h | 1 + arch/x86/include/asm/vmx.h | 2 ++ arch/x86/kvm/vmx.c | 17 +++++++++++++++++ 3 files changed, 20 insertions(+) diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 57433e4..96124c8 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -135,6 +135,7 @@ #define MSR_IA32_RTIT_ADDR2_B 0x00000585 #define MSR_IA32_RTIT_ADDR3_A 0x00000586 #define MSR_IA32_RTIT_ADDR3_B 0x00000587 +#define MSR_IA32_RTIT_ADDR_COUNT 8 #define MSR_IA32_RTIT_CR3_MATCH 0x00000572 #define MSR_IA32_RTIT_OUTPUT_BASE 0x00000560 #define MSR_IA32_RTIT_OUTPUT_MASK 0x00000561 diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h index 80e3e22..6293803 100644 --- a/arch/x86/include/asm/vmx.h +++ b/arch/x86/include/asm/vmx.h @@ -240,6 +240,8 @@ enum vmcs_field { GUEST_PDPTR3_HIGH = 0x00002811, GUEST_BNDCFGS = 0x00002812, GUEST_BNDCFGS_HIGH = 0x00002813, + GUEST_IA32_RTIT_CTL = 0x00002814, + GUEST_IA32_RTIT_CTL_HIGH = 0x00002815, HOST_IA32_PAT = 0x00002c00, HOST_IA32_PAT_HIGH = 0x00002c01, HOST_IA32_EFER = 0x00002c02, diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c index 26fe9e7..7eaf774 100644 --- a/arch/x86/kvm/vmx.c +++ b/arch/x86/kvm/vmx.c @@ -566,6 +566,21 @@ static inline int pi_test_sn(struct pi_desc *pi_desc) (unsigned long *)&pi_desc->control); } +struct pt_ctx { + u64 ctl; + u64 status; + u64 output_base; + u64 output_mask; + u64 cr3_match; + u64 addrs[MSR_IA32_RTIT_ADDR_COUNT]; +}; + +struct pt_desc { + unsigned int addr_num; + struct pt_ctx host; + struct pt_ctx guest; +}; + struct vcpu_vmx { struct kvm_vcpu vcpu; unsigned long host_rsp; @@ -655,6 +670,8 @@ struct vcpu_vmx { */ u64 msr_ia32_feature_control; u64 msr_ia32_feature_control_valid_bits; + + struct pt_desc pt_desc; }; enum segment_cache_field { -- 1.8.3.1