From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756513AbdKCNxf (ORCPT ); Fri, 3 Nov 2017 09:53:35 -0400 Received: from mail-wr0-f193.google.com ([209.85.128.193]:48518 "EHLO mail-wr0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756334AbdKCNwu (ORCPT ); Fri, 3 Nov 2017 09:52:50 -0400 X-Google-Smtp-Source: ABhQp+Tkx6wqb34893vd2AQZ1cJ8qmiGfnmGMEjb18T4vW89BA6TUjMNaGfgS1kksyg3zhdiaJXA4A== From: "=?UTF-8?q?Christian=20K=C3=B6nig?=" X-Google-Original-From: =?UTF-8?q?Christian=20K=C3=B6nig?= To: linux-pci@vger.kernel.org, dri-devel@lists.freedesktop.org, platform-driver-x86@vger.kernel.org, linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, helgaas@kernel.org Subject: [PATCH 3/4] x86/PCI: Enable a 64bit BAR on AMD Family 15h (Models 60h-6fh) Processors Date: Fri, 3 Nov 2017 14:52:43 +0100 Message-Id: <1509717164-1946-3-git-send-email-christian.koenig@amd.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1509717164-1946-1-git-send-email-christian.koenig@amd.com> References: <1509717164-1946-1-git-send-email-christian.koenig@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Just add the extra PCI-ID to the existing fixup. Signed-off-by: Christian König --- arch/x86/pci/fixup.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/x86/pci/fixup.c b/arch/x86/pci/fixup.c index aa8b20e..3eebb0e 100644 --- a/arch/x86/pci/fixup.c +++ b/arch/x86/pci/fixup.c @@ -639,7 +639,8 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x8c10, quirk_apple_mbp_poweroff); * configuring host bridge windows using the _PRS and _SRS methods. * * But this is rarely implemented, so we manually enable a large 64bit BAR for - * PCIe device on AMD Family 15h (Models 00h-1fh, 30h-3fh) Processors here. + * PCIe device on AMD Family 15h (Models 00h-1fh, 30h-3fh, 60h-6fh) Processors + * here. */ static void pci_amd_enable_64bit_bar(struct pci_dev *dev) { @@ -697,6 +698,7 @@ static void pci_amd_enable_64bit_bar(struct pci_dev *dev) } DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AMD, 0x1401, pci_amd_enable_64bit_bar); DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AMD, 0x141b, pci_amd_enable_64bit_bar); +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AMD, 0x1571, pci_amd_enable_64bit_bar); DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AMD, 0x1601, pci_amd_enable_64bit_bar); #endif -- 2.7.4