From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756475AbdKGCti (ORCPT ); Mon, 6 Nov 2017 21:49:38 -0500 Received: from mail-pf0-f194.google.com ([209.85.192.194]:46914 "EHLO mail-pf0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756458AbdKGCtd (ORCPT ); Mon, 6 Nov 2017 21:49:33 -0500 X-Google-Smtp-Source: ABhQp+ScWa76DfNVGTe4nfvLf+mfUlURhgdUwUn7TUye0MQCT/cbPGk8RtcRrvVlhq7GmaCoZjmQ1w== From: Chris Zhong To: heiko@sntech.de Cc: Chris Zhong , Rob Herring , Mark Rutland , Russell King , linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH] ARM: dts: add phy-reset property for rk3066a-rayeager emac Date: Tue, 7 Nov 2017 10:49:19 +0800 Message-Id: <1510022959-19440-1-git-send-email-zyw@rock-chips.com> X-Mailer: git-send-email 2.7.4 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The ethernet phy of rk3066a-rayeager has a reset pin, it controlled by GPIO1_D6, this pin should be pull down then pull up to reset the phy. Add a phy-reset property in emac, make the phy can be reset when emac power on. Signed-off-by: Chris Zhong --- arch/arm/boot/dts/rk3066a-rayeager.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/rk3066a-rayeager.dts b/arch/arm/boot/dts/rk3066a-rayeager.dts index 570157f..6064a0a 100644 --- a/arch/arm/boot/dts/rk3066a-rayeager.dts +++ b/arch/arm/boot/dts/rk3066a-rayeager.dts @@ -173,6 +173,8 @@ pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&rmii_rst>; phy = <&phy0>; phy-supply = <&vcc_rmii>; + phy-reset-gpios = <&gpio1 RK_PD6 GPIO_ACTIVE_LOW>; /* PHY_RST */ + phy-reset-duration = <10>; /* millisecond */ status = "okay"; phy0: ethernet-phy@0 { -- 2.7.4