From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932556AbdLTT7T (ORCPT ); Wed, 20 Dec 2017 14:59:19 -0500 Received: from mga06.intel.com ([134.134.136.31]:28152 "EHLO mga06.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932470AbdLTT7P (ORCPT ); Wed, 20 Dec 2017 14:59:15 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.45,433,1508828400"; d="scan'208";a="13971410" From: Sohil Mehta To: Joerg Roedel , Alex Williamson Cc: David Woodhouse , Ashok Raj , iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Jacob Pan , Gayatri Kammela , Sohil Mehta , Ravi V Shankar , Andy Shevchenko , Lu Baolu , Fenghua Yu , Kirill Shutemov , Dave Hansen Subject: [PATCH 3/4] iommu/vt-d: Add a check for 5-level paging support Date: Wed, 20 Dec 2017 11:59:26 -0800 Message-Id: <1513799967-22454-4-git-send-email-sohil.mehta@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1513799967-22454-1-git-send-email-sohil.mehta@intel.com> References: <1513799967-22454-1-git-send-email-sohil.mehta@intel.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add a check to verify IOMMU 5-level paging support. If the CPU supports supports 5-level paging but the IOMMU does not support it then disable SVM by not allocating PASID tables. Signed-off-by: Sohil Mehta --- drivers/iommu/intel-svm.c | 4 ++++ include/linux/intel-iommu.h | 1 + 2 files changed, 5 insertions(+) diff --git a/drivers/iommu/intel-svm.c b/drivers/iommu/intel-svm.c index fcab440..4072a18 100644 --- a/drivers/iommu/intel-svm.c +++ b/drivers/iommu/intel-svm.c @@ -45,6 +45,10 @@ int intel_svm_alloc_pasid_tables(struct intel_iommu *iommu) !cap_fl1gp_support(iommu->cap)) return -EINVAL; + if (cpu_feature_enabled(X86_FEATURE_LA57) && + !cap_5lp_support(iommu->cap)) + return -EINVAL; + /* Start at 2 because it's defined as 2^(1+PSS) */ iommu->pasid_max = 2 << ecap_pss(iommu->ecap); diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h index a56bab1..8dad3dd 100644 --- a/include/linux/intel-iommu.h +++ b/include/linux/intel-iommu.h @@ -83,6 +83,7 @@ /* * Decoding Capability Register */ +#define cap_5lp_support(c) (((c) >> 60) & 1) #define cap_pi_support(c) (((c) >> 59) & 1) #define cap_fl1gp_support(c) (((c) >> 56) & 1) #define cap_read_drain(c) (((c) >> 55) & 1) -- 2.7.4