From mboxrd@z Thu Jan 1 00:00:00 1970 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933508AbeALBbf (ORCPT + 1 other); Thu, 11 Jan 2018 20:31:35 -0500 Received: from mail-qt0-f194.google.com ([209.85.216.194]:44314 "EHLO mail-qt0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932807AbeALBba (ORCPT ); Thu, 11 Jan 2018 20:31:30 -0500 X-Google-Smtp-Source: ACJfBov8wHrvd4mIVk86u3iY4U4B5eL7Rt9v5H8cxl1bhfW05EN3X3IqEYl0KBDZTEE5VZBEU3P2mg== From: Florian Fainelli To: bcm-kernel-feedback-list@broadcom.com Cc: Florian Fainelli , Tejun Heo , Kishon Vijay Abraham I , Heiko Stuebner , Srinath Mannam , Krzysztof Kozlowski , Vivek Gautam , Dan Carpenter , linux-ide@vger.kernel.org (open list:LIBATA SUBSYSTEM (Serial and Parallel ATA drivers)), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v2 1/2] phy: brcm-sata: Implement calibrate callback Date: Thu, 11 Jan 2018 17:31:07 -0800 Message-Id: <1515720668-4860-2-git-send-email-f.fainelli@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1515720668-4860-1-git-send-email-f.fainelli@gmail.com> References: <1515720668-4860-1-git-send-email-f.fainelli@gmail.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: Implement the calibration callback to allow turning on the Clock-Data Recovery module clamping when necessary, e.g: during failure to identify a SATA hard drive from ahci_brcm.c::brcm_ahci_read_id. Signed-off-by: Florian Fainelli --- drivers/phy/broadcom/phy-brcm-sata.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/drivers/phy/broadcom/phy-brcm-sata.c b/drivers/phy/broadcom/phy-brcm-sata.c index 3f953db70288..8000ce312d95 100644 --- a/drivers/phy/broadcom/phy-brcm-sata.c +++ b/drivers/phy/broadcom/phy-brcm-sata.c @@ -150,6 +150,9 @@ enum sata_phy_regs { TXPMD_TX_FREQ_CTRL_CONTROL2_FMIN_MASK = 0x3ff, TXPMD_TX_FREQ_CTRL_CONTROL3 = 0x84, TXPMD_TX_FREQ_CTRL_CONTROL3_FMAX_MASK = 0x3ff, + + RXPMD_REG_BANK = 0x1c0, + RXPMD_RX_FREQ_MON_CONTROL1 = 0x87, }; enum sata_phy_ctrl_regs { @@ -505,8 +508,37 @@ static int brcm_sata_phy_init(struct phy *phy) return rc; } +static void brcm_stb_sata_calibrate(struct brcm_sata_port *port) +{ + void __iomem *base = brcm_sata_pcb_base(port); + struct brcm_sata_phy *priv = port->phy_priv; + u32 tmp = BIT(8); + + brcm_sata_phy_wr(base, RXPMD_REG_BANK, RXPMD_RX_FREQ_MON_CONTROL1, + ~tmp, tmp); +} + +static int brcm_sata_phy_calibrate(struct phy *phy) +{ + struct brcm_sata_port *port = phy_get_drvdata(phy); + int rc = -EOPNOTSUPP; + + switch (port->phy_priv->version) { + case BRCM_SATA_PHY_STB_28NM: + case BRCM_SATA_PHY_STB_40NM: + brcm_stb_sata_calibrate(port); + rc = 0; + break; + default: + break; + }; + + return rc; +} + static const struct phy_ops phy_ops = { .init = brcm_sata_phy_init, + .calibrate = brcm_sata_phy_calibrate, .owner = THIS_MODULE, }; -- 2.7.4