From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Google-Smtp-Source: AH8x224JoptSEJC9NA1iAYEvaa6tgmMtAzpAncz6woS/YAUBoLRMg5555DRhaemvKKcr4Ec7KFPL ARC-Seal: i=1; a=rsa-sha256; t=1516449940; cv=none; d=google.com; s=arc-20160816; b=RHHOeXw+t8rP/wUBgvV4LvDN342A6ywR9VN3q5Di8hWl+ggyapwOXuQMZZLPj0R1cG VokbUiDbPY9mG+Bc18m/LSnIsWou8emWcn2T+r2bZqPicHNlU6oSIeecQNW1Lmy/ZxUR YYOOIiMqxWtAMSFWZtYX+j2xikUwdHs55U5yti8GjBQRXLeo23PX0DQ/g7joTOINmMFN 4834JKW5MtACmcxrtYyMI77UQhlTx0KuXfjYRKxfTxno6gY7mHUGPxn0mqcC50q15Bau flcWlxE5rZteBZs15BPwYxV5jz4qsAV8koEFVO6PSn04EoCT927qJ10QSGlYyeR3gVfR d/JA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:to:from :dkim-signature:arc-authentication-results; bh=DaxbwME+Dxlcj672qE9wTVJAZqSn8lMcsvXNTIA6Cus=; b=uIDu52U0oacT3IZKr5FKKQrwN2xNHEOGIvbCbKwoWWizrp21pSj2VJEboEUjoKZJW/ HMEf5madLj9UemGuEFmihUN4n1wWRJBi5xoNEO92uaNXTvduC0BVTnyka/b3dfQMaboH koKBypyvmijOHUoTKyeXN91uF0Dgg49/x3mShM5MoAjIq6gb5W7rH+PCrwFHfXrB9qle sz7wz5ZV0aA2OwfH2DYmRyaVvxKSQfcWnUV3OPcuVLj8jG7m3IRdA0gptK6nz4KneUqc /fR8YcTzkpUmvLNxFKSHaPyGNHbkD/sp3N14CWhtfsy6ImFwuMMqcXp7tE+L27IbP5aV fBzQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@amazon.co.uk header.s=amazon201209 header.b=YyNb4pZk; spf=pass (google.com: domain of prvs=55101727d=dwmw@amazon.com designates 72.21.196.25 as permitted sender) smtp.mailfrom=prvs=55101727d=dwmw@amazon.com; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amazon.co.uk Authentication-Results: mx.google.com; dkim=pass header.i=@amazon.co.uk header.s=amazon201209 header.b=YyNb4pZk; spf=pass (google.com: domain of prvs=55101727d=dwmw@amazon.com designates 72.21.196.25 as permitted sender) smtp.mailfrom=prvs=55101727d=dwmw@amazon.com; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amazon.co.uk X-IronPort-AV: E=Sophos;i="5.46,386,1511827200"; d="scan'208";a="665670543" From: David Woodhouse To: arjan@linux.intel.com, tglx@linutronix.de, karahmed@amazon.de, x86@kernel.org, linux-kernel@vger.kernel.org, tim.c.chen@linux.intel.com, bp@alien8.de, peterz@infradead.org, pbonzini@redhat.com, ak@linux.intel.com, torvalds@linux-foundation.org, gregkh@linux-foundation.org Subject: [PATCH 4/4] x86/pti: Do not enable PTI on fixed Intel processors Date: Sat, 20 Jan 2018 12:03:33 +0000 Message-Id: <1516449813-7654-5-git-send-email-dwmw@amazon.co.uk> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1516449813-7654-1-git-send-email-dwmw@amazon.co.uk> References: <1516449813-7654-1-git-send-email-dwmw@amazon.co.uk> X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: =?utf-8?q?1590113012988085522?= X-GMAIL-MSGID: =?utf-8?q?1590113012988085522?= X-Mailing-List: linux-kernel@vger.kernel.org List-ID: When they advertise the IA32_ARCH_CAPABILITIES MSR and it has the RDCL_NO bit set, they don't need KPTI either. Signed-off-by: David Woodhouse --- arch/x86/kernel/cpu/common.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index e5d66e9..80572ae 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -900,8 +900,13 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c) setup_force_cpu_cap(X86_FEATURE_ALWAYS); - if (c->x86_vendor != X86_VENDOR_AMD) - setup_force_cpu_bug(X86_BUG_CPU_MELTDOWN); + if (c->x86_vendor != X86_VENDOR_AMD) { + unsigned long ia32_cap = 0; + if (cpu_has(c, X86_FEATURE_ARCH_CAPABILITIES)) + rdmsrl(MSR_IA32_ARCH_CAPABILITIES, ia32_cap); + if (!(ia32_cap & ARCH_CAP_RDCL_NO)) + setup_force_cpu_bug(X86_BUG_CPU_MELTDOWN); + } setup_force_cpu_bug(X86_BUG_SPECTRE_V1); setup_force_cpu_bug(X86_BUG_SPECTRE_V2); -- 2.7.4